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Related publications (31)

Asynchronous sar adc with unit length capacitors and constant common mode monotonic switching

A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) comprising a Track-and-Hold (T/H) switch configured for a sampling of an input voltage in the form of charge onto a capacitor; a Capacitive Digital-to- Analog Converter (CD AC) opera ...

2021

Direct time-of-flight SPAD image sensors for light detection and ranging

Preethi Padmanabhan

Depth sensing is an increasingly important feature in many applications of consumer, automotive, augmented/virtual reality (AR-VR), space and bio-medical imaging. Long range, high depth resolution, high spatial resolution, and high frame rates are often co ...

EPFL2021

Low Noise Clock Generation: Modeling, Analysis and Implementation

Duygu Kostak

The aim of this thesis is to implement, analyze and improve the selected low noise clock generation and distribution techniques for ADC implementations. The thesis is divided into two parts. The first part focuses on the sampling phase generation and distr ...

EPFL2021

A 32 Gb/s PAM-16 TX and ADC-Based RX AFE with 2-tap embedded analog FFE in 28 nm FDSOI

Yusuf Leblebici, Ayça Akkaya, Firat Çelik

This paper presents a 32 Gb/s 16-level pulse amplitude modulation (PAM-16) source-series-terminated transmitter (TX) and a receiver (RX) analog front-end (AFE) in 28 nm FDSOI. The 8-way time-interleaved successive-approximation register (SAR) analog-to-dig ...

2021

Parallel Analog Computing Based on a 2×2 Multiple-Input Multiple-Output Metasurface Processor With Asymmetric Response

Romain Christophe Rémy Fleury, Ali Momeni, Amirhossein Babaee

We present a polarization-insensitive metasurface processor to perform spatial asymmetric filtering of an incident beam, thereby allowing for real-time parallel analog processing. To enable massive parallel processing, we introduce a multiple-input multipl ...

American Physical Society (APS)2021

ANTIGONE: A Programmable Energy-Efficient Current Digitizer for an ISFET Wearable Sweat Sensing System

Maher Kayal, François Krummenacher, Evgenia Voulgari

This article describes the design and the characterization of the ANTIGONE (ANalog To dIGital cONvErter) ASIC (Application Specific Integrated Circuit) built in AMS 0.35 m technology for low dc-current sensing. This energy-efficient ASIC was specifically d ...

2021

Analysis system and method for analysing the movement of a portion of the body and/or of a human prosthesis

Silvestro Micera, Andrea Crema, Fiorenzo Artoni

An analysis method (200) for analysing the pressure exerted by a portion of the body and/or of a human prosthesis comprises the following steps: sampling data generated by the portion of the body and/or the human prosthesis during a threshold calibration p ...

2021

Versatile shaping of optical frequency combs and applications

Jianqi Hu

Optical frequency combs are a series of phase-locked and equidistant laser lines in the spectral domain. In the time domain, they correspond to periodic pulse trains by the Fourier relation. The ability to shape optical combs and pulse trains is pivotal to ...

EPFL2021

Deep Image Restoration: Between Data Fidelity and Learned Priors

Majed El Helou

Image restoration reconstructs, as faithfully as possible, an original image from a potentially degraded version of it. Image degradations can be of various types, for instance haze, unwanted reflections, optical or spectral aberrations, or other physicall ...

EPFL2021

A 0.4 nJ Excitation Energy Bridge-to-Digital Converter for Implantable Pulmonary Artery Pressure Monitoring

Marco Mattavelli, Catherine Dehollain, Diego Ruben Barrettino, Kerim Türe, Mustafa Besirli

This paper presents an energy-efficient, duty-cycled, and spinning excitation bridge-to-digital converter (BDC) suitable for measuring the pulmonary artery pressure of heart failure patients with an implantable system. The duty-cycled bridge uses resistanc ...

IEEE2021

A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process

Edoardo Charbon

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along with an analytical ...

IOP Publishing Ltd2021

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