Field-programmability

About
Privacy
Disclaimer

Graph Chatbot

Related publications (27)

Towards More Efficient Logic Blocks by Exploiting Biconditional Expansion

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Gain Kim, Luca Gaetano Amarù

Nowadays, Field Programmable Gate Arrays (FPGA) exploit Look-Up Tables (LUTs) to generate logic functions. A K-input LUT can implement any Boolean functions with K inputs. Thanks to this flexibility, LUTs remained concep ...

2015

A Study on Buffer Distribution for RRAM-based FPGA Routing Structures

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Somayyeh Rahimian Omam

Compared to Application-Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) provide reconfigurablity at the cost of lower performance and higher power consumption. Exploiting a large number of programmable switche ...

IEEE2015

Non-LUT field-programmable gate arrays

Paolo Ienne, Grace Zgheib, David Novo Bruna, Hadi Parandeh Afshar

New logic blocks capable of replacing the use of Look-Up Tables (LUTs) in integrated circuits, such as Field-Programmable Gate Arrays (FPGAs), are disclosed herein. In one embodiment, the new logic block is a tree structure comprised of a number of levels ...

2014

Coarse Grain Clock Gating Of Streaming Applications In Programmable Logic Implementations

Marco Mattavelli, Endri Bezati, Simone Casale Brunet

Streaming applications describe a broad class of computing algorithms in areas such as signal processing, media coding and compression, cryptography, video analytics, network touting and packet processing and many others. For many of these applications, pr ...

Ieee2014

Design and Architectural Assessment of 3-D Resistive Memory Technologies in FPGAs

Giovanni De Micheli, Davide Sacchetto, Mohamed Haykel Ben Jamaa, Pierre-Emmanuel Julien Marc Gaillardon

Emerging Non-Volatile Memories (eNVMs) such as Phase-Change RAMs (PCRAMs) or Oxide-based Resistive RAMs (OxRRAMs) are promising candidates to replace Flash and Static Random Access Memories in many applications. This paper introduces a novel set of buildin ...

Institute of Electrical and Electronics Engineers2013

GMS: Generic Memristive Structure for Non-Volatile FPGAs

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Shashi Kanth Bobba

The invention of the memristor enables new possibilities for computation and non-volatile memory storage. In this paper we propose a Generic Memristive Structure (GMS) for 3-D FPGA applications. The GMS cell is demonstrated to be utilized for steering logi ...

2012

Analytical and compact models of the ONO capacitance in embedded non-volatile flash devices

Alexandre Schmid, Yusuf Leblebici, Davide Garetto

The floating gate (FG) potential VFG in a non–volatile flash memory (NVM) device is the main parameter controlling the behavior of the cell. A common technique to model VFG is based on the calculation of the coupling coefficients between all the terminals ...

2009

Page 2 of 2