Lectures related to Physical design (electronics)

Semicustom RTL Design: Backend

Explores the backend design flow in semicustom ASIC design, covering layout, clock tree generation, and tapeout preparation.

Semicustom RTL Design: Frontend with Synthesis

Covers the fundamentals of VLSI design, focusing on the semi-custom design flow.

Semicustom RTL Design: Design Flow and Standard Cells

Explores the RTL design flow, chip-level integration, standard cells, and static timing analysis in VLSI design.

Physical Design Basics

Introduces the basics of physical design in VLSI chip design, emphasizing layout features, power supply wiring, and gate layout optimization.

Fundamentals of VLSI Design

Covers the fundamentals of VLSI design, focusing on circuit optimization and complex system composition.

Logic Design: Basic Rules and Shannon's Expansion

Covers basic rules of logic design and Shannon's expansion in Boolean functions.

Floorplanning and Layout

Covers the basics of floorplanning and layout for digital full custom design in advanced VLSI, emphasizing efficient design strategies.

Virtual Machine Access: Setup and Design Environment

Covers the setup and access to virtual machines for IC design practical exercises.

Introduction to Advanced VLSI Design

Covers Advanced VLSI Design concepts, including Full Custom Design and Parallel Prefix Adder.

PVT Variations, Uncertainty, and Monte-Carlo Simulations

Explores the impact of PVT variations, uncertainties in IC design, worst-case design paradigms, and the importance of Monte-Carlo simulations.

How we design chips: The Digital VLSI Design Flow

Explores the principles and methodologies for designing integrated circuits, covering design flows, VLSI styles, abstraction levels, and the semiconductor ecosystem.

Digital Design: Lowerbounds and Recommendations

Covers abstraction levels, EPFL design flow, lowerbounds, and layout recommendations.

CS Stage: Small-Signal Model and Voltage Gain

Covers the small-signal model and voltage gain in CS stages.

Field Programmable Gate Arrays (FPGAs)

Covers the basic principles and architecture of Field Programmable Gate Arrays (FPGAs) and their implementation options for digital circuits.

Timing Verification and Optimization

Covers timing verification, gate delay modeling, network delay, sensitizable paths, and critical path analysis in digital circuits.

Neural Amplifiers: Theory and Design

Covers the theory and design of neural amplifiers, focusing on capacitive feedback architecture and MOS transistors.

Timing Analysis: Synchronous Circuit Design

Covers timing analysis of synchronous circuits, focusing on flip-flops, timing constraints, and metastability issues.

Digital Logic Circuits: Memory and Decoder Fundamentals

Provides an overview of digital logic circuits, focusing on memory systems and binary decoders, including their operation and access protocols.

Polarity Control in Nanowire FETs

Explores the development of a new programmable polarity device in nanowire FETs.

Logical Effort: Fundamentals of VLSI Design

Covers the Logical Effort method for optimizing logic delay and gate sizing impact.