Lectures related to OR gate | EPFL Graph Search

Logic Systems: Karnaugh Maps and TTL Gates

Explores Karnaugh maps, TTL gates, analog aspects of digital logic, and prime implicants.

Logic Systems: TTL Gates and Analog Aspects

Explores TTL gates, analog aspects, and various logic gates in digital circuits.

Karnaugh Maps: Grouping Techniques

Explores Karnaugh maps, grouping rules, and transistor logic in logic systems.

Complex Gates: Exercise-2 Solution

Covers the design of complex logic gates in VLSI.

Karnaugh Maps: Grouping Rules and Optimization

Explores Karnaugh map representations, grouping rules, optimization, and TTL gate technology.

Logic Gates and IC Technology

Explores the implementation of logic gates in semiconductor material, focusing on TTL and CMOS technologies, ICs, hazards, clocks, D flip-flops, and switch debouncing.

Logic Synthesis: Designing Efficient Digital Circuits

Discusses logic synthesis techniques for designing efficient digital circuits using minterms, maxterms, and new gates like XOR and XNOR.

Introduction to Logisim Evolution: Basics of Digital Circuit Design

Introduces Logisim Evolution, focusing on basic components for digital circuit design.

Neural Networks: Exercises Solutions

Covers solutions for creating logic gates using neural networks and introduces the XOR gate and Recurrent Neural Networks (RNN).

Logical Circuits: Basics

Covers logical circuits, gates, and their combinations to perform basic operations on bits, including adding binary numbers.

Introduction: Course syllabus

Introduces the course syllabus, grading scheme, and classical and quantum computation models.

Complex CMOS Logic Gates

Explores the construction, delay, and sizing of CMOS logic gates, including strategies for transistor sizing and dealing with fan-in.

Stabilizer Codes

Covers the stabilizer formalism in quantum information and error correction.

MOS Transistor: Quick Recap of a Simple Model

Covers the Shockley MOS transistor model, CMOS logic gates, transistor operation, design parameters, and I-V characteristics.

SR Latch and D Flip-Flop: Memory Elements in Logic Systems

Explores SR latch, D flip-flop, multiplexers, XOR gates, and tristate gates in logic systems.

Layout Technique for Double Gate Silicon Nano-Air Fit

Explores a novel layout methodology for enhancing device functionality through dynamic control and presents efficient CF tiles architecture for amybola logic circuits.

Irreversible and Reversible Circuit Theorems

Covers the proofs of Irreversible and Reversible circuit theorems, focusing on gates and the issue of irreversibility and reversibility.

Fault Simulation in VLSI Testing

Explores fault simulation in VLSI testing, covering fault coverage, fault models, algorithms, types of simulators, deductive simulation, and fault propagation rules.

Quantum Metrology: Superconducting Electronics & Qubits

Explores quantum metrology, superconducting electronics, detectors, qubits, and quantum supremacy, emphasizing advancements in quantum computing.

Molecular Transistors: Design and Simulation

Explores molecular transistors for logic computation, design, simulation, and fabrication, emphasizing interconnect parasitics and device performance.