Standard cell

Related lectures (13)

Explores the RTL design flow, chip-level integration, standard cells, and static timing analysis in VLSI design.

Explores the backend design flow in semicustom ASIC design, covering layout, clock tree generation, and tapeout preparation.

Introduces the basics of physical design in VLSI chip design, emphasizing layout features, power supply wiring, and gate layout optimization.

Covers the basic principles and architecture of Field Programmable Gate Arrays (FPGAs) and their implementation options for digital circuits.

Covers in-system debug, marking nets, generating debug IP, and reading from a custom AXI IP.

Covers basic rules of logic design and Shannon's expansion in Boolean functions.

Explores simulation-based verification in VLSI systems using compiled-code and event-driven algorithms.

Delves into the operation of a phosphoric acid fuel cell and its design for electricity and heat co-generation.

Explains MOS transistor operation in triode and saturation regions, focusing on transconductance and layout.

Covers the fundamentals of VLSI design, focusing on the semi-custom design flow.

Delves into SRAM fundamentals, bit cell structure, read/write operations, sizing constraints, and the impact on Moore's Law.

Explores simulation techniques and fault simulation procedures in VLSI systems.

Covers the evolution of digital integrated circuits, market demands impact, modern IC functionalities, microprocessors history, and Moore's law.

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