Publications related to Standard cell

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Stefan Nikolic

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

EPFL2023

Revisiting the Impact of Morphology and Oxidation State of Cu on CO2 Reduction Using Electrochemical Flow Cell

Michael Graetzel, Shaik Mohammed Zakeeruddin, Jing Gao, Dan Ren

Electroreduction of carbon dioxide (CO2) in a flow electrolyzer represents a promising carbon-neutral technology with efficient production of valuable chemicals. In this work, the catalytic performance of polycrystalline copper (Cu), Cu2O-derived copper (O ...

AMER CHEMICAL SOC2022

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

Mirjana Stojilovic

Side-channel CPU disassembly is a side-channel attack that allows an adversary to recover instructions executed by a processor. Not only does such an attack compromise code confidentiality, it can also reveal critical information on the system’s internals. ...

IEEE2022

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Shubham Rai, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022

New Insights for Parasitic Effects of Label-Free Biosensors Based on Capacitive Micromachined Ultrasonic Transducers

Sandro Carrara, Zhengwen Jiang, Yihe Zhao, Jie Li

Capacitive micromachined ultrasonic transducers (CMUTs) are regarded as an attractive candidate in bio-applications such as imaging and molecule monitoring. However, the previous researches on biochemical sensing are mostly air-coupled application based on ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Improving First-Order Threshold Implementations of SKINNY

Subhadeep Banik, Andrea Felice Caforio, Ognjen Glamocanin, Daniel Patrick Collins

Threshold Implementations have become a popular generic technique to construct circuits resilient against power analysis attacks.In this paper, we look to devise efficient threshold circuits for the lightweight block cipher family SKINNY. The only threshol ...

Springer2021

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers

Francesco Regazzoni, Subhadeep Banik, Muhammed Fatih Balli, Andrea Felice Caforio

In the last few years, the field of lightweight cryptography has seen an influx in the number of block ciphers and hash functions being proposed. In the past there have been numerous papers that have looked at circuit level implementation of block ciphers ...

IEEE2021

Adaptive Body Biasing in Strong Body Factor Technologies

Thomas Christoph Müller

With the advent of intelligent sensor nodes in everyday life, low power aspects of system design become more and more important. Adaptive body biasing is a promising methodology to achieve dynamic adaptation of the tradeoff between performance and energy b ...

EPFL2021

A consistent safety format and design approach for brittle systems and application to textile reinforced concrete structures

Aurelio Muttoni, Miguel Fernández Ruiz, Patrick Lorenzo Valeri, Qianhui Yu

Design and verification of structures in modern codes of practice account for a safety format, ensuring that the probability of failure does not exceed a given threshold. Although specific safety formats are proposed in some cases for special types of stru ...

2021

Further Results on Efficient Implementations of Block Cipher Linear Layers

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2021

Optimized electrochemical breakdown etching using temporal voltage variation for formation of nanopores in a silicon membrane

Miao Zhang

Dielectric breakdown etching is a well-known method of making nanopores on thin (similar to 50 nm) dielectric membranes. However, voltage driven translocation of biomolecules through such nanopores becomes extremely fast. For improved detection, for instan ...

ELSEVIER SCIENCE SA2021

Data Structures and Algorithms for Logic Synthesis in Advanced Technologies

Eleonora Testa

Logic synthesis is a key component of digital design and modern EDA tools; it is thus an essential instrument for the design of leading-edge chips and to push the limits of their performance. In the last decades, the electronic circuits community has evolv ...

EPFL2020

Melting SNOW-V: improved lightweight architectures

Subhadeep Banik, Muhammed Fatih Balli, Andrea Felice Caforio

SNOW-V is a stream cipher proposed by Ekdahl et al. at IACR ToSC 2019(3) with an objective to be deployed as the encryption primitive in 5G systems. The stream cipher offers 256-bit security and is ready for deployment in the post-quantum era, in which as ...

2022

Wafer-scale fabrication of ultralow-loss silicon nitride nonlinear photonic circuits

Tobias Kippenberg, Rui Ning Wang, Junqiu Liu, Anat Siddharth, Maxim Karpov, Mikhail Churaev, Jijun He, Guanhao Huang, Wenle Weng, Arslan Sajid Raja, Miles Henry Anderson, Anton Lukashchuk, Nils Johan Engelsen, Alexey Tikan

Recent advances in silicon nitride integrated photonics have achieved ultralow optical losses. Transferring this technology to standard commercial foundries, and merging it with silicon photonics via heterogeneous integration, will seed novel laser and qua ...

IEEE2020

Single-photon avalanche diode imagers in biophotonics: review and outlook

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Samuel Burri, Harald Arjan Robert Homulle

Single-photon avalanche diode (SPAD) arrays are solid-state detectors that offer imaging capabilities at the level of individual photons, with unparalleled photon counting and time-resolved performance. This fascinating technology has progressed at a very ...

2019

Computational characteristics and hardware implications of brain tissue simulations

Francesco Cremonesi

Understanding the link between the brain's anatomy and its function through computer simulations of neural tissue models is a widely used approach in computational neuroscience. This technique enables rapid prototyping and testing of hypotheses, allowing r ...

EPFL2019

Polarity-Controllable Devices and Circuits for Doping-Free 2D Electronics

Giovanni Vincenzo Resta

The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâ s la ...

EPFL2019

More Results on Shortest Linear Programs

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2019