MOS Technology 6502

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Related publications (29)

An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology

Pierre-André Farine, Rafal Tomasz Dlugosz

The paper presents a new initialization mechanism based on a Convex Combination Method (CCM) for Kohonen self-organizing Neural Networks (NNs) realized in the CMOS technology. A proper selection of initial values of the neuron weights exhibits a strong imp ...

Elsevier Science Inc2015

Exploring information retrieval using image sparse representations : from circuit designs and acquisition processes to specific reconstruction algorithms

William Guicquéro

New advances in the field of image sensors (especially in CMOS technology) tend to question the conventional methods used to acquire the image. Compressive Sensing (CS) plays a major role in this, especially to unclog the Analog to Digital Converters which ...

EPFL2015

A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

Edoardo Charbon

In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves da ...

2015

Design of Digital SoC for Operation at High Temperatures

Radisav Cojbasic

There is a growing demand for Systems-on-Chip, integrating microprocessors, on-chip memories, data converters and a variety of sensors, which are capable of reliable operation at high temperatures. For instance, modern aircraft industry demands microcontro ...

EPFL2014

Tri-gate silicon nanowire transistors for ultra-low pH resolution and improved scalability

Enrico Accastelli

The scalability of on-chip analytical systems based on field-effect transistors as pH sensors is limited by the degradation of the signal to noise ratio when decreasing the device size. Nano-sized tri-gate transistors such as silicon nanowires and nanoribb ...

EPFL2014

FireBird: PowerPC e200 Based SoC for High Temperature Operation

Andreas Peter Burg, Yusuf Leblebici, Thomas Maeder, Pascal Andreas Meinerzhagen, Conor Joseph Slater, Ömer Cogal, Carl Christian Sten Dominic Senning, Radisav Cojbasic

PowerPC Architecture microcontrollers are commonly used in embedded applications. In this work we present FireBird, the first PowerPC based SoC for reliable operation beyond 200C. It is a significant challenge to design SoCs for reliable operation at high ...

2013

Offset Compensation Based on Distributed Hall Cell Architecture

Pierre-André Farine, Pavel Kejik, Pierre-François Thibault Bourdelle

A new offset reduction strategy for CMOS Hall devices is proposed. The novelty is to fragment the Hall device into multiple Hall blocks, distributed over the silicon area and easy to interconnect. The suitable number of Hall blocks and the bias current lev ...

Institute of Electrical and Electronics Engineers2013

Carbon Nanotube Precise Assembly for CMOS and NEMS Applications

Ji Cao

As complementary metal–oxide–semiconductor (CMOS) scaling meets fundamental limitations, revolutionary device concepts and materials are urgently needed as alternatives or supplements to CMOS technology. Carbon nanotubes (CNTs), featuring extraordinary phy ...

EPFL2013

Post-CMOS Processing and 3-D Integration Based on Dry-Film Lithography

Carlotta Guiducci, Yusuf Leblebici, Yüksel Temiz

This paper presents a chip-level postcomplementary metal oxide semiconductor (CMOS) processing technique for 3-D integration and through-silicon-via (TSV) fabrication. The proposed technique is based on dry-film lithography, which is a low-cost and simple ...

Ieee-Inst Electrical Electronics Engineers Inc2013

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