Arithmetic logic unit

Applied sciences
Computer engineering
Hardware engineering
Microprocessors

About
Privacy
Disclaimer

Graph Chatbot

Related publications (31)

Energy- and Cost-Efficient VLSI DSP Systems Design with Approximate Computing

Reza Ghanaatian Jahromi

Technology scaling has progressed to enable integrated circuits with extremely high density enabling systems of tremendous complexity with manageable power consumption. With the continuation of Moore's law for many years, electronic chips have been able to ...

EPFL2020

Logic-in-memory based on an atomically thin semiconductor

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Ahmet Avsar, Yanfei Zhao, Guilherme Migliato Marega, Zhenyu Wang

The growing importance of applications based on machine learning is driving the need to develop dedicated, energy-efficient electronic hardware. Compared with von Neumann architectures, which have separate processing and storage units, brain-inspired in-me ...

2020

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

A 30-frames/s, 252 x 144 SPAD Flash LiDAR With 1728 Dual-Clock 48.8-ps TDCs, and Pixel-Wise Integrated Histogramming

Edoardo Charbon, Ivan Michel Antolovic, Scott Anthony Lindner, Chunmin Zhang, Juan Mata Pavia, Martin Wolf

A 252 x 144 single-photon avalanche diode (SPAD) pixel sensor, called Ocelot, is reported for light detection and ranging (LiDAR). The sensor, fabricated in the 180-nm CMOS technology, features 1728 12-bit time-to-digital converters (TDCs) with 48.8-ps res ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

David Atienza Alonso, Marina Zapater Sancho, Pierre-Emmanuel Julien Marc Gaillardon, Yasir Mahmood Qureshi, Xifan Tang, Edouard Giacomin, João Miguel Morgado Pereira Vieira

The need for running complex Machine Learning (ML) algorithms, such as Convolutional Neural Networks (CNNs), in edge devices, which are highly constrained in terms of computing power and energy, makes it important to execute such applications efficiently. ...

2019

A Fast, Reliable and Wide-voltage-range In-memory Computing Architecture

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, William Andrew Simon

In-Memory Computing (IMC) solutions, and particularly bitline computing in SRAM, appear promising as they mitigate one of the most energy consuming aspects in computation: data movement. In this work we propose a fast (2.4Ghz for bitwise operations and 2.4 ...

Association for Computing Machinery2019

Roadmap on all-optical processing

Simon Julien Fabbri, Xiang Zhang

The ability to process optical signals without passing into the electrical domain has always attracted the attention of the research community. Processing photons by photons unfolds new scenarios, in principle allowing for unseen signal processing and comp ...

2019

Trading off Energy versus Accuracy in Modern Computing Systems : From Digital Circuit Design to Programming Techniques

Jérémy Lucien Maurice Schlachter

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018

3D-Stacked CMOS SPAD Image Sensors: Technology and Applications

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee

3Dstacked CMOS SPAD based image sensors hold the promise for better sensitivity and more functionality per pixel. The technology enables to separate detection from computation onto different chips, or tiers, that are stacked onto one another. One advantage ...

IEEE2018

Ultra High-Speed Hardware Emulator for Real-Time Fault Location in Multi-Conductor Power Systems

Maher Kayal, François Krummenacher, François Pierre Gaugaz

This research presents a transmission line model aimed for the fault location in power systems using a method based on the Electromagnetic Time-Reversal (EMTR). The discrete-time model simulates the waves travelling in the line by means of many unit delays ...

IEEE2018

Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter, Mattia Cacciotti

This paper introduces a novel method for designing approximate circuits by fabricating and exploiting false timing paths, i.e. critical paths that cannot be logically activated. This allows to strongly relax timing constraints while guaranteeing minimal an ...

2018

Page 2 of 2