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Related publications (28)

DynOR: A 32-bit Microprocessor in 28 nm FD-SOI with Cycle-By-Cycle Dynamic Clock Adjustment

Andreas Peter Burg, Adam Shmuel Teman, Thomas Christoph Müller, Andrea Bonetti, Jeremy Hugues-Felix Constantin, Lorenz Flavio Schmid

This paper presents DynOR, a 32-bit 6-stage OpenRISC microprocessor with dynamic clock adjustment. To alleviate the issue of unused dynamic timing margins, the clock period of the processor is adjusted on a cycle-by-cycle level, based on the instruction ty ...

Ieee2016

A low-power high-sensitivity single-chip receiver for NMR microscopy

Giovanni Boero, Jens Anders

In this paper, we present a fully-integrated receiver for NMR microscopy applications manufactured in a 0.13 mu m CMOS technology. The design co-integrates a 10-turn planar detection coil together with a complete quadrature, low-IF downconversion receiver ...

Academic Press Inc - Elsevier Science2016

A remotely powered fully integrated low power class-E power amplifier for implantable sensor systems

Catherine Dehollain, Enver Gürhan Kilinç, Kerim Türe

This paper presents a fully integrated low power class-E power amplifier and its integration to remotely powered sensor system. The on-chip 1.2 GHz power amplifier is implemented in 0.18 A mu m CMOS process with 0.2 V supply. The implantable system is powe ...

Springer2016

Cryogenic single chip electron spin resonance detectors

Gabriele Gualco

Methods based on the electron spin resonance (ESR) phenomenon are used to study paramagnetic systems at temperatures that ranges from 1000 to below 1 K. Commercially available spectrometers achieve spin sensitivities in the order of 10^(10) spins/¿Hz at ro ...

EPFL2015

Ultra-low-power ECG front-end design based on compressed sensing

Pierre Vandergheynst, Hossein Mamaghanian

Ultra-low-power design has been a challenging area for design of the sensor front-ends especially in the area of Wireless Body Sensor Nodes (WBSN), where a limited amount of power budget and hardware resources are available. Since introduction of Compresse ...

ACM/IEEE Press2015

A Schottky-Barrier Silicon FinFET with 6.0 mV/dec Subthreshold Slope over 5 Decades of Current

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon, Michele De Marchi

In this paper, we demonstrate a steep Subthreshold Slope (SS) silicon FinFET with Schottky-barrier source/drain. The device shows a minimal SS of 3.4 mV/dec and an average SS of 6.0 mV/dec over 5 decades of current swing. Ultra-low leakage floor of 0.06 pA ...

2014

Design of Digital SoC for Operation at High Temperatures

Radisav Cojbasic

There is a growing demand for Systems-on-Chip, integrating microprocessors, on-chip memories, data converters and a variety of sensors, which are capable of reliable operation at high temperatures. For instance, modern aircraft industry demands microcontro ...

EPFL2014

Integrated Source of Spectrally Filtered Correlated Photons for Large-Scale Quantum Photonic Systems

Matteo Galli, Christophe Marcel Georges Galland, Davide Grassani

We demonstrate the generation of quantum-correlated photon pairs combined with the spectral filtering of the pump field by more than 95 dB on a single silicon chip using electrically tunable ring resonators and passive Bragg reflectors. Moreover, we perfor ...

American Physical Society2014

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