Publications related to Lookup table

Corrigendum: EAST discharge prediction without integrating simulation results (vol 62, 126060, 2022)

Alessandro Pau, Xiaojuan Liu, Chenguang Wan

In the published paper titled 'EAST discharge prediction without integrating simulation results' (2022 Nucl. Fusion 62 126060), figure 5 used the wrong plot, and is not matched with table 3. We used the plot discussed with referees, the case when we do not ...

IOP Publishing Ltd2023

LUT-Based Optimization For ASIC Design Flow

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

In this paper, we develop a new LUT-based optimization flow tailored for the synthesis of ASICs rather than FPGAs. We enhance LUT-mapping to consider the literal/AIG cost of LUT-nodes. We extend traditional Boolean methods to simplify and re-shape LUT-netw ...

2021

Advanced Functional Decomposition Using Majority and Its Applications

Giovanni De Micheli, Mathias Soeken, Zhufei Chu

Typical operators for the decomposition of Boolean functions in state-of-the-art algorithms are AND, exclusive-OR (XOR), and the 2-to-1 multiplexer (MUX). We propose a logic decomposition algorithm that uses the majority-of-three (MAJ) operation. Such a de ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis

Giovanni De Micheli, Mathias Soeken, Heinz Riener, Winston Jason Haaswijk

The paper presents a generalization of DAG-aware AIG rewriting for k-feasible Boolean networks, whose nodes are k-input lookup tables (k-LUTs). We introduce a high-effort DAG-aware rewriting algorithm, called cut rewriting, which uses exact synthesis to co ...

IEEE2019

Finding a Needle in the Haystack of Hardened Interconnect Patterns

Paolo Ienne, Grace Zgheib, Stefan Nikolic

Circuits naturally exhibit recurring patterns of local interconnect. Hardening those patterns when designing Field Programmable Gate Array (FPGA) clusters can both eliminate slow programmable connections from the critical path and remove the need for trans ...

IEEE2019

Interleaving with Coroutines: A Practical Approach for Robust Index Joins

Anastasia Ailamaki, Georgios Psaropoulos

Index join performance is determined by the efficiency of the lookup operation on the involved index. Although database indexes are highly optimized to leverage processor caches, main memory accesses inevitably increase lookup runtime when the index outsiz ...

VLDB Endowment Inc.2017

Enhanced Compressed Look-up-Table Based Real-Time Rectification Hardware

Alexandre Schmid, Yusuf Leblebici, Abdulkadir Akin, Halima Najibi, Luis Manuel Gaemperle

Real-time disparity estimation requires real-time rectification which involves solving the models of lens distortions, image translations and rotations. Low complexity look-up-table based rectification algorithms usually require an external memory to store ...

Springer-Verlag Berlin2015

Asynchronous memory access chaining

Babak Falsafi, Boris Robert Grot, Yusuf Onur Koçberber

In-memory databases rely on pointer-intensive data structures to quickly locate data in memory. A single lookup operation in such data structures often exhibits long-latency memory stalls due to dependent pointer dereferences. Hiding the memory latency by ...

2015

Accelerators for Data Processing

Yusuf Onur Koçberber

The explosive growth in digital data and its growing role in real-time analytics motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance and ush ...

EPFL2015

A Case for Heterogeneous Technology-Mapping: Soft versus Hard Multiplexers

Paolo Ienne, Madhura Purnaprajna

Lookup table-based FPGAs offer flexibility but compromise on performance, as compared to custom CMOS implementations. This paper explores the idea of minimising this performance gap by using fixed, fine-grained, non-programmable logic structures in place o ...

Ieee2013

Compressed look-up-table based real-time rectification hardware

Alexandre Schmid, Yusuf Leblebici, Abdulkadir Akin, Luis Manuel Gaemperle, Ipek Baz

Stereo image rectification is a pre-processing step of disparity estimation intended to remove image distortions and to enable stereo matching along an epipolar line. A real-time disparity estimation system needs to perform real-time rectification which re ...

2013

Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

Babak Falsafi, Boris Robert Grot, Yusuf Onur Koçberber, Javier Picorel Obando, Kevin Lim

The explosive growth in digital data and its growing role in real-time decision support motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance ...

2013

A fast empirical method for galaxy shape measurements in weak lensing surveys

Frédéric Courbin, Georges Meylan, Malte Tewes, Nicolas Cantale

We describe a simple and fast method to correct ellipticity measurements of galaxies from the distortion by the instrumental and atmospheric point spread function (PSF), in view of weak lensing shear measurements. The method performs a classification of ga ...

Edp Sciences S A2012

Numerical algorithm for feedback linearizable systems

Dominique Bonvin, Philippe Müllhaupt

A numerical algorithm that achieves asymptotic stability for feedback linearizable systems is presented. The nonlinear systems can be represented in various forms that include differential equations, simulated physical models or lookup tables. The proposed ...

American Institute of Physics2012

System for generating computer processor

A method and apparatus to produce a net list of gates and Flip-Flops for one algorithm in order to find the best compromise between power consumption, speed and silicon surface by using a two step process. First the algorithm is written for a processor tha ...

2010

Roombots-Towards Decentralized Reconfiguration with Self-Reconfiguring Modular Robotic Metamodules

Auke Ijspeert, Alexander Spröwitz, Mikaël Mayer, Rico Möckel, Stéphane Bonardi, Pierre-André Mudry, Philippe Laprade

This paper presents our work towards a decentralized reconfiguration strategy for self-reconfiguring modular robots, assembling furniture-like structures from Roombots metamodules. We explore how reconfiguration by locomotion from a configuration A to a co ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

SCALAR Data Replication Performance in Mobile Ad hoc Applications

Emre Atsan

Data replication is an indispensable service for mobile ad hoc networks and it helps to increase data availability, reduce communication overhead, achieve fault-tolerance and load balancing. Our scalable and reactive data replication framework SCALAR opera ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Exploiting Fast Carry-Chains Of Fpgas For Designing Compressor Trees

Paolo Ienne, Philip Brisk, Hadi Parandeh Afshar

Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic blocks of FPGAs for fast addition. Conventional intuition is that such carry c ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Sharing of probabilistically correlated data in peer-to-peer networks

Roman Schmidt

The impact of Peer-to-Peer (P2P) networks on the Internet landscape is undisputed. It has led to a series of new applications, e.g., as part of the so-called Web 2.0. The shift from the classical client-server based paradigm of the Internet, with a clear d ...

EPFL2008

Congestion Control for Distributed Hash Tables

Jean-Yves Le Boudec, Karl Aberer, Fabius Klemm

Distributed Hash Tables (DHTs) provide a scalable mechanism for mapping identifiers to socket addresses. As each peer in the network can initiate lookup requests, a DHT has to process concurrently a potentially very large number of requests. In this paper, ...

IEEE2006