R3000

The R3000 is a 32-bit RISC microprocessor chipset developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in June 1988, it was the second MIPS implementation, succeeding the R2000 as the flagship MIPS microprocessor. It operated at 20, 25 and 33.33 MHz. The MIPS 1 instruction set is small compared to those of the contemporary 80x86 and 680x0 architectures, encoding only more commonly used operations and supporting few addressing modes. Combined with its fixed instruction length and only three different types of instruction formats, this simplified instruction decoding and processing. It employed a 5-stage instruction pipeline, enabling execution at a rate approaching one instruction per cycle, unusual for its time. This MIPS generation supports up to four co-processors. In addition to the CPU core, the R3000 microprocessor includes a Control Processor (CP), which contains a Translation Lookaside Buffer and a Memory Management Unit. The CP works as a coprocessor. Besides the CP, the R3000 can also support an external R3010 numeric coprocessor, along with two other external coprocessors. The R3000 CPU does not include level 1 cache. Instead, its on-chip cache controller operates external data and instruction caches of up to 256 KB each. It can access both caches during the same clock cycle. The R3000 found much success and was used by many companies in their workstations and servers. Users included: Ardent Computer Atari COJAG (A modified Atari Jaguar for arcade systems). Digital Equipment Corporation (DEC) for their DECstation workstations and multiprocessor DECsystem servers. Evans & Sutherland for their Vision (ESV) series workstations. LSI Logic for their CW4003 RISC processor core and DCAM-101 system-on-a-chip. MIPS Computer Systems for their MIPS RISC/os Unix workstations and servers. NEC for their RISC EWS4800 workstations and UP4800 servers. Prime Computer Pyramid Technology Seiko Epson Silicon Graphics for their Professional IRIS, Personal IRIS and Indigo workstations, and the multiprocessor Power Series visualization systems.