Publications related to Flat memory model

Oligolithic Cross-task Optimizations across Isolated Workloads

Anastasia Ailamaki, Eleni Zapridou, Panagiotis Sioulas

Enterprises collect data in large volumes and leverage them to drive numerous concurrent decisions and business processes. Their teams deploy multiple applications that often operate concurrently on the same data and infrastructure but have widely differen ...

2024

Rebooting Virtual Memory with Midgard

Siddharth Gupta

Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...

EPFL2023

Data transformer apparatus

Babak Falsafi, Christoph Koch, Siddharth Gupta, Mario Paulo Drumond Lages De Oliveira, Mark Johnathon Sutherland, Arash Pourhabibi Zarandi, Zilu Tian, Hussein Kassir

Data transformer apparatus comprising at least a dispatcher module (D), a reader module (R), a converter module (C) and a writer module (W). The dispatcher module (D) is configured to: receive a data transformation request (DTR) including: a first informat ...

2021

Rebooting Virtual Memory with Midgard

Babak Falsafi, Mathias Josef Payer, Siddharth Gupta, Atri Bhattacharyya, Yunho Oh, Abhishek Bhattacharjee

Computer systems designers are building cache hierarchies with higher capacity to capture the ever-increasing working sets of modern workloads. Cache hierarchies with higher capacity improve system performance but shift the performance bottleneck to addres ...

2021

Log-Free Concurrent Data Structures

Rachid Guerraoui, Aleksandar Dragojevic, Mihail Igor Zablotchi, Tudor Alexandru David

Non-volatile RAM (NVRAM) makes it possible for data structures to tolerate transient failures, assuming however that programmers have designed these structures such that their consistency is preserved upon recovery. Previous ap- proaches are typically tran ...

USENIX Association2018

Log-Free Concurrent Data Structures

Rachid Guerraoui, Aleksandar Dragojevic, Mihail Igor Zablotchi, Tudor Alexandru David

Non-volatile RAM (NVRAM) makes it possible for data structures to tolerate transient failures, assuming however that programmers have designed these structures such that their consistency is preserved upon recovery. Previous approaches are typically transa ...

USENIX ASSOC2018

Near-Memory Address Translation

Javier Picorel Obando

Virtual memory (VM) is a crucial abstraction in modern computer systems at any scale, from handheld devices to datacenters. VM provides programmers the illusion of an always sufficiently large and linear memory, making programming easier. Although the core ...

EPFL2017

Towards Scalable Synchronization on Multi-Cores

Vasileios Trigonakis

The shift of commodity hardware from single- to multi-core processors in the early 2000s compelled software developers to take advantage of the available parallelism of multi-cores. Unfortunately, only few---so-called embarrassingly parallel---applications ...

EPFL2016

Storage method and apparatus for random access memory using codeword storage

Harm Cronie

A memory circuit, such as an embedded DRAM array, stores information as groups of bits or data using information coding in storage and retrieval data, instead of each bit being stored separately. Write data words can be mapped to storage format words that ...

2016

Accelerators for Data Processing

Yusuf Onur Koçberber

The explosive growth in digital data and its growing role in real-time analytics motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance and ush ...

EPFL2015

Verification of STM on relaxed memory models

Rachid Guerraoui, Vasu Singh

Software transactional memories (STM) are described in the literature with assumptions of sequentially consistent program execution and atomicity of high level operations like read, write, and abort. However, in a realistic setting, processors use relaxed ...

Springer Verlag2011

Fusion of Multi-Atlas Segmentations with Spatial Distribution Modeling

Jean-Philippe Thiran, Meritxell Bach Cuadra, Subrahmanyam Venkata Ravi Mohana Sai Gorthi

In recent years, multi-atlas fusion methods have gained significant attention in medical image segmentation. In this paper, we propose a general Markov Random Field (MRF) based framework that can perform edge-preserving smoothing of the labels at the time ...

2011

Formalizing and verifying transactional memories

Vasu Singh

Transactional memory (TM) has shown potential to simplify the task of writing concurrent programs. TM shifts the burden of managing concurrency from the programmer to the TM algorithm. The correctness of TM algorithms is generally proved manually. The goal ...

EPFL2010

Software Transactional Memory on Relaxed Memory Models

Rachid Guerraoui, Vasu Singh

Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptions are often violated in realistic settings, as STM implementations run on relaxed mem ...

Springer2009

PAI: A lightweight mechanism for single-node memory recovery in DSM servers

Babak Falsafi

Several recent studies identify the memory system as the most frequent source of hardware failures in commercial servers. Techniques to protect the memory system from failures must continue to service memory requests, despite hardware failures. Furthermore ...

2007

A multitasking and data-driven architecture for multi-agents simulations

Sébastien Schertenleib

The expansion of 3D real-time simulations (3DRTS) into millions of homes together with the technical progress of computers hardware force to approach software developments for 3DRTS from different perspectives. From an historical standpoint, 3DRTS started ...

EPFL2006