Publications related to Floating-gate MOSFET

Magnon-Assisted Magnetization Reversal of Ni81Fe19 Nanostripes on Y3Fe5O12 with Different Interfaces

Dirk Grundler, Andrea Mucchietto, Korbinian Baumgärtl

Magnetic bit writing by short-wave magnons without conversion to the electrical domain is expected to be a game-changer for in-memory computing architectures. Recently, the reversal of nanomagnets by propagating magnons was demonstrated. However, experimen ...

2024

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Guilherme Migliato Marega

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

EPFL2023

On Energy Control of Modular Multilevel Converters

Milan Utvic

Owing to the advancements in the area of power electronics, efficient and flexible ac to dc conversion is made possible, bringing back into focus the idea of the dc power transmission at various voltage levels. Several technical and economical factors advo ...

EPFL2023

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Andras Kis, Guilherme Migliato Marega

Two-dimensional materials (2DMs) have found potential applications in many areas of electronics, such as sensing, memory systems, optoelectronics, and power. Despite an intense experimental work, the literature is lacking of accurate modeling of nonvolatil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Guilherme Migliato Marega, Zhenyu Wang

Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap toward ubiquitous electron ...

2022

Enhancement-mode Multi-channel AlGaN/GaN Transistors with LiNiO Junction Tri-Gate

Elison de Nazareth Matioli, Luca Nela, Taifang Wang

Multi-channel GaN power device, consisting of stacking multiple two-dimensional-electron-gas (2DEG) channels, has been demonstrated to achieve unprecedented on-state performance while maintaining high breakdown voltage (VBR). However, the large carrier den ...

Institute of Electrical and Electronics Engineers2022

P-GaN Tri-Gate MOS Structure for Normally-Off GaN Power Transistors

Elison de Nazareth Matioli, Jun Ma, Luca Nela, Catherine Erine, Minghua Zhu, Pirouz Sohi, Mohammad Samizadeh Nikooytabalvandani

In this letter, we present a new concept for normally-off AlGaN/GaN-on-Si MOS-HEMTs based on the combination of p-GaN, tri-gate and MOS structures to achieve high threshold voltage (V-TH) and low on-resistance (R-ON). The p-GaN is used to engineer the band ...

Institute of Electrical and Electronics Engineers2021

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Mirjana Stojilovic, Hossein Asadi, Zeinab Seifoori

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

2021

Enhancement Mode Tri-gate GaN Power Devices and Logic Circuits

Minghua Zhu

Gallium Nitride (GaN) is one of the most promising materials for high frequency power switching due to its exceptional properties such as large saturation velocity, high carrier mobility, and high breakdown field strength. The high switching frequency of G ...

EPFL2021

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

Mohammad Khaja Nazeeruddin, Tom Theodorus Antonius Lummen, Peng Gao, Hobeom Kim

Here we use triple-cation metal-organic halide perovskite single crystals for the transistor channel of a flash memory device. Moreover, we design and demonstrate a 10 nm thick single-layer nanofloating gate. It consists of a ternary blend of two organic s ...

2020

At the end of scaling: 2D materials for computing and sensing applications

Nicolò Oliva

In the past half-century, the digital revolution completely changed the world we live in and the ways we experience it. Over this period, the underlying force supporting the continuous technological development has been the geometrical scaling of transisto ...

EPFL2020

Logic-in-memory based on an atomically thin semiconductor

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Ahmet Avsar, Yanfei Zhao, Guilherme Migliato Marega, Zhenyu Wang

The growing importance of applications based on machine learning is driving the need to develop dedicated, energy-efficient electronic hardware. Compared with von Neumann architectures, which have separate processing and storage units, brain-inspired in-me ...

2020

Accurate deep neural network inference using computational phase-change memory

Irem Boybat Kara, Evangelos Eleftheriou, Abu Sebastian

In-memory computing using resistive memory devices is a promising non-von Neumann approach for making energy-efficient deep learning inference hardware. However, due to device variability and noise, the network needs to be trained in a specific way so that ...

Nature Research2020

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Alexandre Sébastien Julien Levisse, Pierre-Emmanuel Julien Marc Gaillardon

With the continuous scaling of CMOS technology, integrating an embedded high-density non-volatile memory appears to be more and more costly and technologically challenging. Beyond floating-gate memory technologies, bipolar resistive random access memories ...

2018

Resistive random access memory based multiplexers and field programmable gate arrays

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Gain Kim, Edouard Giacomin

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

2018

The Cryogenic Temperature Behavior of Bipolar, MOS, and DTMOS Transistors in Standard CMOS

Edoardo Charbon, Harald Arjan Robert Homulle, Fabio Sebastiano

Both CMOS bandgap voltage references and temperature sensors rely on the temperature behavior of either CMOS substrate BJTs or MOS transistors in weak inversion. Bipolar transistors are generally preferred over MOS transistors because of their lower spread ...

2018

Hardware / Software Architectural and Technological Exploration for Energy-Efficient and Reliable Biomedical Devices

Loris Gérard Duch

Nowadays, the ubiquity of smart appliances in our everyday lives is increasingly strengthening the links between humans and machines. Beyond making our lives easier and more convenient, smart devices are now playing an important role in personalized health ...

EPFL2018

Negative Capacitance Field Effect Transistors; Capacitance Matching and non-Hysteretic Operation

Mihai Adrian Ionescu, Christian Enz, Igor Stolichnov, Farzan Jazaeri, Ali Saeidi, Francesco Bellando

This work experimentally demonstrates negative capacitance MOSFETs in hysteretic and non-hysteretic modes of operation. A PZT capacitor is externally connected to the gate of commercial nMOSFETs fabricated in 28nm CMOS technology to explore the negative ca ...

IEEE2017

Endurance Management for Resistive Logic-In-Memory Computing Architectures

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon

Resistive Random Access Memory (RRAM) is a promising non-volatile memory technology which enables modern in-memory computing architectures. Although RRAMs are known to be superior to conventional memories in many aspects, they suffer from a low writ ...

Ieee2017

Single field effect transistor capacitor-less memory device and method of operating the same

Mihai Adrian Ionescu, Arnab Biswas, Nilay Dagtekin

A single field effect transistor capacitor-less memory device, and method of operating the same, including a drain region, a source region, an intrinsic channel region between the drain region and the source region forming the single field effect transisto ...

Technology Transfer Office EPFL2016