Hardware description language

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Related lectures (32)

Arbiter FSM & FPGA Implementation

Covers the design of an Arbiter FSM in VHDL for digital system design, emphasizing access timing management.

VHDL for Synthesis

Covers basic VHDL constructs for RTL design, including arithmetic, multiplexers, registers, and instantiation.

VHDL Packages

Covers the importance of VHDL packages in simplifying design consistency and minimizing errors in VHDL circuits.

Test of VLSI Systems

Covers test techniques for digital VLSI systems, including fault modeling and design for testability.

Performance Metrics: Evaluation and Tools

Explores performance metrics, Amdahl's Law implications, means evaluation, challenges in multiprocessor systems, and commercial server software.

In-System Debug and Custom AXI IP

Covers in-system debug, marking nets, generating debug IP, and reading from a custom AXI IP.

Sequential Logic Circuits in VHDL

Covers modeling sequential logic circuits in VHDL, including processes, control instructions, flip-flops, counters, and registers.

Concurrent Instructions in VHDL

Covers concurrent instructions in VHDL, demonstrating parallel processing and conditional assignments.

Storage Management in SmartDataLake

Explores storage management challenges in transitioning to data lakes, addressing software and hardware heterogeneity, unified storage design, and performance optimization.

Formally Verified Chisel Designs

Explores formally verifying Chisel designs using SMT solvers and covers examples like delayed assertions and proofs by induction.

Keylock in VHDL and on FPGA

Covers the design of a KeyLock system in VHDL, focusing on the FSM implementation for key validation and LED indication.

More VHDL for Synthesis: Sequential Statements & Processes

Explores VHDL for synthesis, emphasizing sequential statements and processes.

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