Lectures related to Transaction-level modeling

Explores reactive anticipatory robot skills with memory for fast adaptation to changing objectives through time-correlations and memory feedback.

Explores challenges in hardware verification, clear specifications, speculation harm, and cycle-precise semantics.

Explores simulation-based verification in VLSI systems using compiled-code and event-driven algorithms.

Explores formally verifying Chisel designs using SMT solvers and covers examples like delayed assertions and proofs by induction.