Lectures in course EE-429: Fundamentals of VLSI design

Covers the fundamentals of VLSI design, focusing on circuit optimization and complex system composition.

Offers a historical journey through VLSI technology, covering key milestones, challenges, and future prospects in the field.

How we design chips: The Digital VLSI Design Flow

Explores the principles and methodologies for designing integrated circuits, covering design flows, VLSI styles, abstraction levels, and the semiconductor ecosystem.

MOS Transistor: Quick Recap of a Simple Model

Covers the Shockley MOS transistor model, CMOS logic gates, transistor operation, design parameters, and I-V characteristics.

CMOS Inverter VTC: Voltage Transfer Characteristic

Explores the voltage transfer characteristic of a CMOS inverter, analyzing DC parameters for optimal design.

Inverter DC Characteristics

Explains the DC characteristics of an inverter, including the switching threshold VM and noise margins.

Dynamic Inverter Characteristics

Explores inverter delay, sizing, parasitic capacitances, and device impact on delay optimization in digital circuits.

Complex CMOS Logic Gates

Explores the construction, delay, and sizing of CMOS logic gates, including strategies for transistor sizing and dealing with fan-in.

Complex Gates: Exercise-2 Solution

Covers the design of complex logic gates in VLSI.

Sequential Elements: Latches and Flip-Flops

Explores sequential elements in VLSI design, including latches, flip-flops, setup time, and hold time.

CADENCE Lab 2: Automated Sweeps for Setup/Hold Analysis

Covers running automated sweeps for setup/hold analysis using CADENCE software.

Logical Effort: Fundamentals of VLSI Design

Covers the Logical Effort method for optimizing logic delay and gate sizing impact.

Logical Effort: Optimum Sizing and Branch Efforts

Explores logical effort, optimum sizing, and branch efforts in VLSI design.

Interconnect / Wires

Explores the evolution and importance of interconnect technologies in VLSI design, focusing on wire geometries and capacitance.

SRAM Memory Architecture

Covers the fundamentals of VLSI design related to SRAM and memory arrays for better density.

SRAM Memory Architecture & Bit Cell

Delves into SRAM fundamentals, bit cell structure, read/write operations, sizing constraints, and the impact on Moore's Law.

SRAM: Peripherals and Noise Margin

Covers the operation of SRAM, focusing on peripherals and noise margin.

Power Consumption and Energy

Explores the significance of power and energy in VLSI design, covering topics like power reduction, energy efficiency, and voltage scaling.

Technology Scaling and Trends

Explores technology scaling, Moore's Law impact, and future trends in VLSI design.

PVT Variations, Uncertainty, and Monte-Carlo Simulations

Explores the impact of PVT variations, uncertainties in IC design, worst-case design paradigms, and the importance of Monte-Carlo simulations.