Lectures related to Fault Collapsing in VLSI Systems

Logical Effort: Fundamentals of VLSI Design

Covers the Logical Effort method for optimizing logic delay and gate sizing impact.

Explores defects, errors, and fault models in VLSI systems, emphasizing fault collapsing and dominance.

Semicustom RTL Design: Design Flow and Standard Cells

Explores the RTL design flow, chip-level integration, standard cells, and static timing analysis in VLSI design.

Introduces SCOAP measures for testability analysis in VLSI systems, covering controllability, observability, and test vector length prediction.

Logical Effort: Optimum Sizing and Branch Efforts

Explores logical effort, optimum sizing, and branch efforts in VLSI design.

Test of VLSI Systems: ATPG and Fault Coverage

Explores test vector generation, ATPG algorithms, fault coverage, and path sensitization in VLSI systems.

Introduction to Advanced VLSI Design

Covers Advanced VLSI Design concepts, including Full Custom Design and Parallel Prefix Adder.

Power Consumption and Energy

Explores the significance of power and energy in VLSI design, covering topics like power reduction, energy efficiency, and voltage scaling.

Test of VLSI Systems: Combinational and Sequential ATPG

Covers the generation of test vector patterns, fault modeling, structural vs. functional tests, and the implementation of time-frame expansion.

Semicustom RTL Design: Frontend with Synthesis

Covers the fundamentals of VLSI design, focusing on the semi-custom design flow.

Digital Logic Circuits: CMOS and Verilog Design

Discusses digital logic circuits, CMOS technology, and Verilog for circuit design.

Introduction to Logisim Evolution: Basics of Digital Circuit Design

Introduces Logisim Evolution, focusing on basic components for digital circuit design.

Testing of VLSI Systems

Explores defects, errors, and faults in VLSI systems, including fault models and testing challenges.

Path-Delay Fault Testing

Covers linked and unlinked faults in VLSI systems, March test algorithms, critical paths, and path-delay fault testing.

Tri-State Inverter: Master-Slave Flip-Flop Applications

Covers the tri-state inverter and its role in master-slave flip-flops in digital circuits.

Logic Systems: TTL Gates and Analog Aspects

Explores TTL gates, analog aspects, and various logic gates in digital circuits.

Digital Systems Overview: Evolution and Fundamentals

Explores the evolution of digital systems, covering basics like Boolean algebra and logic gates, and emphasizes teamwork skills and professional vocabulary.

Complex Gates: Exercise-2 Solution

Covers the design of complex logic gates in VLSI.

Combinational and Sequential ATPG

Covers the D-calculus and implication procedures for fault detection in VLSI systems.