Publications by Giovanni De Micheli

Area-Oriented Resubstitution For Networks of Look-Up Tables

Giovanni De Micheli, Alessandro Tempia Calvino, Andrea Costamagna

This paper addresses the challenge of reducing the number of nodes in Look-Up Table (LUT) networks with two significant applications. First, Field-Programmable Gate Arrays (FPGAs) can be modelled as networks of LUTs, and minimizing the node count is impera ...

2025

The Council on Electronic Design Automation

Giovanni De Micheli

Institute of Electrical and Electronics Engineers (IEEE)2025

Area-Oriented Optimization After Standard-Cell Mapping

Giovanni De Micheli, Alessandro Tempia Calvino, Andrea Costamagna

We address the problem of minimizing the area of circuits mapped to a technology library, with or without delay constraints. While traditional methods optimize first a technology-independent representation and then perform technology mapping to a library, ...

Association for Computing Machinery2025

Benchmarking of Scaled Majority-Logic-Synthesized Spintronic Circuits Based on Magnetic Tunnel Junction Transducers

Giovanni De Micheli, Siang-Yun Lee

It is envisaged that spintronic logic devices will ultimately be utilized in hybrid CMOS-spintronic systems where signal interconversion between magnetic and electrical domains via transducers takes place. This underscores the vital role of transducers in ...

2025

Technology Legalization and Optimization for Adiabatic Quantum-Flux Parametron

Giovanni De Micheli, Alessandro Tempia Calvino

Adiabatic quantum-flux parametron (AQFP) is an energy-efficient superconducting technology. Before physical design can be performed, AQFP technology mapping involves not only mapping logic into supported gate types but also legalizing the circuit to fulfil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2025

Gradient Approximation of Approximate Multipliers for High-Accuracy Deep Neural Network Retraining

Giovanni De Micheli

Approximate multipliers (AppMults) are widely employed in deep neural network (DNN) accelerators to reduce the area, delay, and power consumption. However, the inaccuracies of AppMults degrade DNN accuracy, necessitating a retraining process to recover acc ...

Institute of Electrical and Electronics Engineers2025

SPFD-Based Delay Resynthesis

Giovanni De Micheli, Andrea Costamagna

We propose novel algorithms for post-mapping delay optimization, referred to as delay resynthesis. The state-of-the-art approach optimizes delay by rewriting with optimal local substructures. However, it is limited to local transformations, does not exploi ...

IEEE2025

Symmetry-Based Synthesis for Interpretable Boolean Evaluation

Giovanni De Micheli, Andrea Costamagna

Efficient evaluation of Boolean functions is a fundamental problem in computer science, impacting computational complexity and hardware performance. A natural way to evaluate Boolean functions is using circuits composed of two-input operators. However, syn ...

IEEE Computer Society2025

Lazy Man’s Resynthesis For Glitching-Aware Power Minimization

Giovanni De Micheli, Andrea Costamagna

This paper presents a novel resynthesis engine for minimizing the dynamic power of digital circuits. Traditional logic synthesis methods primarily focus on zero-delay toggles—logic state changes occurring between the start and end of a clock cycle. In cont ...

Institute of Electrical and Electronics Engineers2025

Scalable Sequential Logic Synthesis Using Observability Don’t Care Conditions

Giovanni De Micheli, Dewmini Sudara Marakkalage

Sequential logic synthesis expands the solution space compared to combinational logic synthesis by reasoning about the reachable states of memory elements, leading to better Power-Performance-Area (PPA) outcomes. As gate costs continue to rise in advanced ...

2025

Back-end-aware Fault-tolerant Quantum Oracle Synthesis

Giovanni De Micheli, Alessandro Tempia Calvino, Mingfei Yu

Quantum oracle synthesis involves compiling arbitrary Boolean functions into quantum circuits using specific quantum gates supported by the target quantum computer. The Clifford+T gate library is particularly common in fault-tolerant quantum computing syst ...

Association for Computing Machinery2025

Unleashing the Power of T1-cells in SFQ Arithmetic Circuits

Giovanni De Micheli, Mingfei Yu, Rassul Bairamkulov

Rapid single-flux quantum (RSFQ) is one of the most advanced cryogenic superconductive electronics technologies. With orders of magnitude smaller power dissipation, RSFQ is an attractive technology for cloud computing, aerospace electronics, and high-speed ...

Institute of Electrical and Electronics Engineers Inc.2024

Algebraic and Boolean Methods for SFQ Superconducting Circuits

Giovanni De Micheli, Alessandro Tempia Calvino

Rapid single-flux quantum (RSFQ) is one of the most advanced and promising superconducting logic families, offering exceptional energy efficiency and speed. RSFQ technology requires delay registers (DFFs) and splitter cells to satisfy the path-balancing an ...

2024

Efficient Resubstitution-Based Approximate Logic Synthesis

Giovanni De Micheli

Approximate computing is an emerging paradigm for designing error-resilient applications. It reduces circuit area, power, and delay at the cost of allowingintroducing errors. This paper introducesproposes a powerful technique, termed Approximate Resubstitu ...

2024

Enhancing Delay-Driven LUT Mapping with Boolean Decomposition

Giovanni De Micheli, Alessandro Tempia Calvino

Ashenhurst-Curtis decomposition (ACD) is a decomposition technique used, in particular, to map combinational logic into lookup tables (LUTs) structures when synthesizing hardware designs. However, available implementations of ACD suffer from excessive comp ...

2024

An Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization

Giovanni De Micheli, Andrea Costamagna

Logic synthesis is an ensemble of algorithms that optimizes digital circuit representations and maps them to a chosen technology. Minimizing the number of gates is essential to reduce area occupation and power consumption. As the problem is intractable, he ...

2024

Scalable Logic Rewriting Using Don’t Cares

Giovanni De Micheli, Alessandro Tempia Calvino

Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

2024

Superconductive Electronics: A 25-Year Review

Giovanni De Micheli, Rassul Bairamkulov

The challenges of conventional semiconducting electronics, such as dark silicon, memory wall, and stagnant clock frequency motivate the search for alternative computing technologies. Superconductive electronics (SCE) represents one of the most advanced bey ...

Ieee-Inst Electrical Electronics Engineers Inc2024

RareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats

Giovanni De Micheli, Mingfei Yu

Hardware Trojan (HT) poses a critical security threat to integrated circuits, which can change circuit functionality or leak sensitive data. HTs are typically activated under low-probability conditions by exploiting "rare signals" in logic circuits. In thi ...

ACM2024

On the Synthesis of High-performance Homomorphic Boolean Circuits

Giovanni De Micheli, Alessandro Tempia Calvino, Mingfei Yu

The rapid growth of cloud computing has intensified the need for secure data outsourcing solutions. Fully homomorphic encryption (FHE) offers a promising approach by enabling computations on encrypted data without exposing the plaintext. This paper advance ...

Association for Computing Machinery, Inc2024