Publications by Fabio Sebastiano

Nano-MOSFET - Foundation of Quantum Computing Part I

As big strides were being made in many science fields in the 1970s and 80s, faster computation for solving problems in molecular biology, semiconductor technology, aeronautics, particle physics, etc., was at the forefront of research. Parallel and super-co ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

A 1-GS/s 6-8-b Cryo-CMOS SAR ADC for Quantum Computing

Edoardo Charbon, Fabio Sebastiano, Alessandro Catania

This article presents a two-times interleaved, loop-unrolled SAR analog-to-digital converter (ADC) operational from 300 down to 4.2 K. The 6-8-bit resolution and the sampling speed up to 1 GS/s are targeted at digitizing the multi-channel frequency-multipl ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Scalable multi-chip quantum architectures enabled by cryogenic hybrid wireless/quantum-coherent network-in-package

Edoardo Charbon, Fabio Sebastiano

The grand challenge of scaling up quantum computers requires a full-stack architectural standpoint. In this position paper, we will present the vision of a new generation of scalable quantum computing architectures featuring distributed quantum cores (Qcor ...

IEEE2023

A Cryo-CMOS Oscillator With an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications

Edoardo Charbon, Fabio Sebastiano, Yue Chen

This article presents a 4-to-5 GHz LC oscillator operating at 4.2K for quantum computing applications. The phase noise (PN) specification of the oscillator is derived based on the control fidelity for a single-qubit operation. To reveal the substantial gap ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A Cryo-CMOS PLL for Quantum Computing Applications

Edoardo Charbon, Fabio Sebastiano

This article presents the first cryogenic phase-locked loop (PLL) operating at 4.2 K. The PLL is designed for the control system of scalable quantum computers. The specifications of PLL are derived from the required control fidelity for a single-qubit oper ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Cryogenic CMOS Circuits and Systems: Challenges and Opportunities in Designing the Electronic Interface for Quantum Processors

Edoardo Charbon, Fabio Sebastiano

Quantum computing could potentially offer faster solutions for some of today's classically intractable problems using quantum processors as computational support for quantum algorithms [1]. Quantum processors, in the most frequent embodiment, comprise an a ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

A Low-Jitter and Low-Spur Charge-Sampling PLL

Edoardo Charbon, Fabio Sebastiano

This article presents a low-jitter and low-spur charge-sampling phase-locked loop (CSPLL). A charge-domain sub-sampling phase detector is introduced to achieve a high phase-detection gain and to reduce the PLL in-band phase noise. Even without employing an ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A 1GS/s 6-to-8b 0.5mW/Qubit Cryo-CMOS SAR ADC for Quantum Computing in 40nm CMOS

Edoardo Charbon, Fabio Sebastiano, Alessandro Catania

IEEE2021

A 6-to-8GHz 0.17mW/Qubit Cryo-CMOS Receiver for Multiple Spin Qubit Readout in 40nm CMOS Technology

Edoardo Charbon, Fabio Sebastiano

IEEE2021

A 2.7mW 45fS(rms)-Jitter Cryogenic Dynamic-Amplifier-Based PLL for Quantum Computing Applications

Edoardo Charbon, Fabio Sebastiano

IEEE2021

A Wideband Low-Power Cryogenic CMOS Circulator for Quantum Applications

Edoardo Charbon, Fabio Sebastiano, Andrea Ruffino, Yatao Peng

Quantum computers require classical electronics to ensure fault-tolerant operation. To address compactness and scalability, it was proposed to implement such electronics as integrated circuits operating at cryogenic temperatures close to those at which qua ...

2020

Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control

Edoardo Charbon, Fabio Sebastiano

The design of a large-scale quantum computer requires co-optimization of both the quantum bits (qubits) and their control electronics. This work presents the first systematic design of such a controller to simultaneously and accurately manipulate the state ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Cryo-CMOS for Analog/Mixed-Signal Circuits and Systems

Edoardo Charbon, Fabio Sebastiano

CMOS circuits operating at cryogenic temperature (cryo-CMOS) are required in several low-temperature applications. A compelling example is the electronic interface for quantum processors, which must reside very close to the cryogenic quantum devices it ser ...

IEEE2020

Characterization and Analysis of On-Chip Microwave Passive Components at Cryogenic Temperatures

Edoardo Charbon, Fabio Sebastiano, Andrea Ruffino

This paper presents the characterization and modeling of microwave passive components in TSMC 40-nm bulk CMOS, including metal-oxide-metal (MoM) capacitors, transformers, and resonators, at deep cryogenic temperatures (4.2 K). To extract the parameters of ...

2020

Characterization and Modeling of Mismatch in Cryo-CMOS

Edoardo Charbon, Fabio Sebastiano

This paper presents a device matching study of a commercial 40-nm bulk CMOS technology operated at cryogenic temperatures. Transistor pairs and linear arrays, optimized for device matching, were characterized over the temperature range from 300 K down to 4 ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Edoardo Charbon, Fabio Sebastiano

Cryogenic device models are essential for the reliable design of the cryo-CMOS electronic interface necessary to build future large-scale quantum computers. This paper reports the characterization of the drain-current mismatch of NMOS and PMOS devices fabr ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

A 10-to-12 GHz 5mW Charge-Sampling PLL Achieving 50 fsec RMS Jitter,-258.9 dB FOM and-65 dBc Reference Spur

Edoardo Charbon, Fabio Sebastiano

This paper presents a charge-sampling PLL (CSPLL), that demonstrates the best reported jitter-power FOM of -258.9 dB thanks to its high phase-detection gain and to the removal of the power-hungry buffer driving the phase detector. It also achieves -65 dBc ...

IEEE2020

19.3 A 200dB FoM 4-to-5GHz Cryogenic Oscillator with an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications

Edoardo Charbon, Fabio Sebastiano, Yue Chen

IEEE2020

A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4x32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers

Edoardo Charbon, Fabio Sebastiano

IEEE2020

SPINE (SPIN Emulator) - A Quantum-Electronics Interface Simulator

Edoardo Charbon, Fabio Sebastiano

A quantum computer comprises a quantum processor and the associated control electronics used to manipulate the qubits at the core of a quantum processor. CMOS circuits placed close to the quantum bits and operating at cryogenic temperatures offer the best ...

IEEE2019