Publications by Davide Sacchetto

Towards integrated photonic interposers for processing octave-spanning microresonator frequency combs

Michail Zervas, Davide Sacchetto, Michael Wolfgang Geiselmann

Microcombs-optical frequency combs generated in microresonators-have advanced tremendously in the past decade, and are advantageous for applications in frequency metrology, navigation, spectroscopy, telecommunications, and microwave photonics. Crucially, m ...

SPRINGERNATURE2021

Integrated Photonic Interposers for Processing Octave-Spanning Microresonator Frequency Combs

Michail Zervas, Davide Sacchetto, Michael Wolfgang Geiselmann

We demonstrate multiple silicon-nitride nanophotonic elements for on-chip processing of octave-spanning microresonator frequency combs. Dichroic filters, multimode interferometers, and tunable add-drop microring filters are shown along with soliton microco ...

IEEE2020

Fully textured monolithic perovskite/silicon tandem solar cells with 25.2% power conversion efficiency

Christophe Ballif, Laura Ding, Sylvain Nicolay, Quentin Thomas Jeangros, Davide Sacchetto, Mathieu Gérard Boccard, Matthieu Despeisse, Jérémie Werner, Florent Sahli, Loris Barraud, Raphaël Monnard, Gianluca Cattaneo, Bertrand Yves Paul Paviet-Salomon, Björn Niesen, Matthias Wolfgang Bräuninger

Tandem devices combining perovskite and silicon solar cells are promising candidates to achieve power conversion efficiencies above 30% at reasonable costs. State-of-the-art monolithic two-terminal perovskite/silicon tandem devices have so far featured sil ...

2018

Monolithic Fabrication of Silicon Nanowires Bridging Thick Silicon Structures

Yusuf Leblebici, Oliver Peric, Davide Sacchetto, Zuhal Tasdemir

A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of 10 mu ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

Hybrid sequential deposition process for fully textured perovskite/silicon tandem solar cells

Christophe Ballif, Laura Ding, Sylvain Nicolay, Quentin Thomas Jeangros, Soo-Jin Moon, Arnaud Walter, Davide Sacchetto, Mathieu Gérard Boccard, Matthieu Despeisse, Jérémie Werner, Florent Sahli, Loris Barraud, Raphaël Monnard, Monica Morales Masis, Gianluca Cattaneo, Bertrand Yves Paul Paviet-Salomon, Björn Niesen, Gizem Nogay, Oscar Esteban Rucavado Leandro, Matthias Wolfgang Bräuninger, Peter Joseph Fiala, Chien-Jen Yang, Fan Fu

Tandem solar cells that feature a high-bandgap perovskite cell on top of a lower bandgap silicon cell have the potential to reach efficiencies > 30%. Here, we present a versatile hybrid deposition method that yields conformal perovskite cells directly on t ...

IEEE2018

Control of Resistive Switching in Mott Memories Based on TiN/AM4Q8/TiN MIM Devices

Giovanni De Micheli, Davide Sacchetto, Jury Sandrini, Pierre-Emmanuel Julien Marc Gaillardon

The family of AM4Q8 chalcogenide Mott insulators gained attention in recent years for its application opportunities. Here, we explore and validate the resistive switching mechanism of thin-film of GaV4S8 sandwich ...

Electrochemical Society2017

ITO/MoOx/a-Si:H(i) Hole-Selective Contacts for Silicon Heterojunction Solar Cells: Degradation Mechanisms and Cell Integration

Christophe Ballif, Aïcha Hessler-Wyser, Antoine Descoeudres, Sylvain Nicolay, Quentin Thomas Jeangros, Gabriel Christmann, Davide Sacchetto, Matthieu Despeisse, Loris Barraud, Jonas Geissbühler

Molybdenum oxide is an efficient hole collector for silicon solar cells. However, its optoelectronic properties deteriorate during cell manufacturing. To assess this issue, the optoelectronic properties and microstructure of molybdenum oxide-based hole con ...

2017

Progression towards high efficiency perovskite solar cells via optimisation of the front electrode and blocking layer

Christophe Ballif, Sylvain Nicolay, Soo-Jin Moon, Arnaud Walter, Davide Sacchetto, Björn Niesen, Matthias Wolfgang Bräuninger

The effects of a fluorine doped tin oxide (FTO) electrode, titanium dioxide (TiO2-x) blocking layer (BL) and perovskite (methyl ammonium lead triiodide) preparation on the overall properties of the photovoltaic cells have been studied. The FTO electrode wa ...

Royal Society of Chemistry2016

Efficient Near-Infrared-Transparent Perovskite Solar Cells Enabling Direct Comparison of 4-Terminal and Monolithic Perovskite/Silicon Tandem Cells

Christophe Ballif, Sylvain Nicolay, Soo-Jin Moon, Arnaud Walter, Davide Sacchetto, Nicolas Tétreault, Stefaan De Wolf, Matthieu Despeisse, Jérémie Werner, Florent Sahli, Loris Barraud, Bertrand Yves Paul Paviet-Salomon, Björn Niesen, Matthias Wolfgang Bräuninger

Combining market-proven silicon solar cell technology with an efficient wide band gap top cell into a tandem device is an attractive approach to reduce the cost of photovoltaic systems. For this, perovskite solar cells are promising high-efficiency top cel ...

Amer Chemical Soc2016

Zinc tin oxide as high-temperature stable recombination layer for mesoscopic perovskite/silicon monolithic tandem solar cells

Christophe Ballif, Sylvain Nicolay, Soo-Jin Moon, Arnaud Walter, Davide Sacchetto, Stefaan De Wolf, Xavier Niquille, Jérémie Werner, Monica Morales Masis, Björn Niesen, Philipp Friedrich Hermann Löper, Oscar Esteban Rucavado Leandro

Perovskite/crystalline silicon tandem solar cells have the potential to reach efficiencies beyond those of silicon single-junction record devices. However, the high-temperature process of 500 °C needed for state-of-the-art mesoscopic perovskite cells has, ...

American Institute of Physics2016

Co-design of ReRAM Passive Crossbar Arrays Integrated in 180nm CMOS Technology

Yusuf Leblebici, Giovanni De Micheli, Michele De Marchi, Davide Sacchetto, Jury Sandrini, Pierre-Emmanuel Julien Marc Gaillardon, Tugba Demirci, Maxime Victor Thammasack, Marios Barlas

This work presents the co-integration of resistive random access memory crossbars within a 180nm Read-Write CMOS chip. TaOx-based ReRAMs have been fabricated and characterized with materials and process steps compatible with the CMOS Back-End-of ...

Institute of Electrical and Electronics Engineers2016

Resistive Switching Element and Use Thereof

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon, Tugba Demirci

A bipolar resistive switching device including an electrically conductive bottom electrode, a stack of transition metal oxides layers, a number of transition metal oxide layers being equal or greater than 2, the stack including: at least one MOx layer, at ...

2016

Monolithic fabrication of silicon nanowires bridging thick silicon structures

Yusuf Leblebici, Oliver Peric, Davide Sacchetto, Zuhal Tasdemir, Georg Fantner

2015

Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology

Yusuf Leblebici, Davide Sacchetto, Jury Sandrini, Tugba Demirci, Maxime Victor Thammasack

This paper presents a read-write design solution for passive ReRAM crossbar memory arrays to overcome the sneak current paths problem. The proposed circuitry includes an auto-calibration feature to overcome the sneak current effects during the READ operati ...

2015

Graphene Field Effect Devices Operating in Differential Circuit Configuration

Yusuf Leblebici, Clemens Benedict Nyffeler, Davide Sacchetto

We study the concept of a basic building block for circuits using differential signaling and being based on graphene field effect devices. We fabricated a number of top-gated graphene FETs using commercially available graphene and employing electron beam l ...

Elsevier2015

Heterogeneous Integration of ReRAM Crossbars in 180nm CMOS BEoL Process

Yusuf Leblebici, Giovanni De Micheli, Davide Sacchetto, Jury Sandrini, Pierre-Emmanuel Julien Marc Gaillardon, Tugba Demirci, Maxime Victor Thammasack

This work reports on a heterogeneous integration of resistive memories into the Back-End-of-the-Line of 180nm standard CMOS foundry chips. A TaOx-based ReRAM technology with materials and processes fully CMOS compatible has been developed and characterized ...

Elsevier2015

Cmos compatible non-volatile latch and d-flip flop using resistive switching materials

Yusuf Leblebici, Davide Sacchetto, Tugba Demirci

A non-volatile latch circuitry, comprising a Re RAM cell configured to store a final value of the non-volatile latch circuitry; a data selection circuitry configured to connect or disconnect a data input to a plus voltage node and a minus voltage node of t ...

2014

Top-Down Fabrication of Gate-All-Around Vertically-Stacked Silicon Nanowire FETs with Controllable Polarity

Yusuf Leblebici, Giovanni De Micheli, Michele De Marchi, Davide Sacchetto, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

Asthe currentMOSFET scaling trend is facing strong limitations, technologies exploiting novel degrees of freedom at physical and architecture level are promising candidates to enable the continuation of Moore's predictions. In this paper, we report on the ...

Institute of Electrical and Electronics Engineers2014

Graphene Field Effect Devices Operating in Differential Configuration

Yusuf Leblebici, Clemens Benedict Nyffeler, Davide Sacchetto

After decades of miniaturization and performance tuning, Silicon electronics is approaching its technological limits. In the search for alternative transistor channel materials, Graphene has been given much attention since its discovery in 2004, mainly bec ...

2014

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Yusuf Leblebici, Pascal Andreas Meinerzhagen, Giovanni De Micheli, Davide Sacchetto, Andreas Peter Burg, Pierre-Emmanuel Julien Marc Gaillardon

The total power budget of Ultra-Low Power (ULP) VLSI Systems-on-Chip (SoCs) is often dominated by the leakage power of embedded memories as well as status registers. On the one hand, supply voltage scaling down to the near-threshold (near-VT

Institute of Electrical and Electronics Engineers2014