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Louis Coulon

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Related units (1)

Processor Architecture Laboratory

EPFL
IC
IINFCOM
LAP

Related publications (4)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

FRIDA: Reconfigurable Arrays for Dynamically Scheduled High-Level Synthesis

Paolo Ienne, Mirjana Stojilovic, Louis Coulon

Reconfigurable computing fabrics include FPGAs and CGRAs. FPGAs offer flexible bit-level reconfigurability and can map almost any program via high-level synthesis (HLS) compilers, but they incur high area and speed overheads compared to ASICs. CGRAs, in co ...

ACM Association for Computing Machinery2025

Equinox: Training (for Free) on a Custom Inference Accelerator

Babak Falsafi, Ahmet Caner Yüzügüler, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi, Louis Coulon, Martin Jaggi

DNN inference accelerators executing online services exhibit low average loads because of service demand variability, leading to poor resource utilization. Unfortunately, reclaiming idle inference cycles is difficult as other workloads can not execute on a ...

ACM2021

Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs

Francesco Regazzoni, Mirjana Stojilovic, Louis Coulon, Ognjen Glamocanin

Embedded and cyber-physical systems are pervading all aspects of our lives, including sensitive and critical ones. As a result, they are an alluring target for cyber attacks. These systems, whose implementation is often based on reconfigurable hardware, ar ...

2020