Publications related to Inverse Gating for Low Energy Block Ciphers

New Insights for Parasitic Effects of Label-Free Biosensors Based on Capacitive Micromachined Ultrasonic Transducers

Sandro Carrara, Zhengwen Jiang, Jie Li, Yihe Zhao

Capacitive micromachined ultrasonic transducers (CMUTs) are regarded as an attractive candidate in bio-applications such as imaging and molecule monitoring. However, the previous researches on biochemical sensing are mostly air-coupled application based on ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Further Results on Efficient Implementations of Block Cipher Linear Layers

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2021

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers

Francesco Regazzoni, Andrea Felice Caforio, Muhammed Fatih Balli, Subhadeep Banik

In the last few years, the field of lightweight cryptography has seen an influx in the number of block ciphers and hash functions being proposed. In the past there have been numerous papers that have looked at circuit level implementation of block ciphers ...

IEEE2021

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Eleonora Testa, Mathias Soeken, Dewmini Sudara Marakkalage, Heinz Riener

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Sensitivity, Noise and Resolution in a B -Modified Foundry-Made ISFET with Miniaturized Reference Electrode for Wearable Point-of-Care Applications

Mihai Adrian Ionescu, Luca Selmi, Junrui Zhang, Francesco Bellando, Pierpaolo Palestri

Ion-sensitive field-effect transistors (ISFETs) form a high sensitivity and scalable class of sensors, compatible with advanced complementary metal-oxide semiconductor (CMOS) processes. Despite many previous demonstrations about their merits as low-power i ...

2021

Low Noise Clock Generation: Modeling, Analysis and Implementation

Duygu Kostak

The aim of this thesis is to implement, analyze and improve the selected low noise clock generation and distribution techniques for ADC implementations. The thesis is divided into two parts. The first part focuses on the sampling phase generation and distr ...

EPFL2021

Serial Lightweight Implementation Techniques for Block Ciphers

Muhammed Fatih Balli

Most of the cryptographic protocols that we use frequently on the internet are designed in a fashion that they are not necessarily suitable to run in constrained environments. Applications that run on limited-battery, with low computational power, or area ...

EPFL2021

More Results on Shortest Linear Programs

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2019

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019

Fluorescence lifetime imaging with a single-photon SPAD array using long overlapping gates: an experimental and theoretical study

Claudio Bruschini, Edoardo Charbon, Arin Can Ülkü, Andrei Ardelean

Developing large arrays of single-photon avalanche diodes (SPADs) with on-chip time-correlated single-photon counting (TCSPC) capabilities continues to be a difficult task due to stringent silicon real estate constraints, high data rates and system complex ...

2019

Compact Circuits for Combined AES Encryption/Decryption

Subhadeep Banik

The implementation of the AES encryption core by Moradi et al. at Eurocrypt 2011 is one of the smallest in terms of gate area. The circuit takes around 2400 gates and operates on an 8 bit datapath. However this is an encryption only core and unable to cate ...

2019

Scaling-up ESOP Synthesis for Quantum Compilation

Giovanni De Micheli, Mathias Soeken, Bruno Schmitt Antunes

Today's rapid advances in quantum computing hardware call for scalable synthesis methods to map combinational logic represented as multi-level Boolean networks (e.g., an and inverter graph, AIG) to quantum circuits. Such synthesis process must yield revers ...

IEEE2019

A Magnet-Based Timing System to Detect Gate Crossings in Alpine Ski Racing

Kamiar Aminian, Benedikt Fasel

In alpine skiing, intermediate times are usually measured with photocells. However, for practical reasons, the number of intermediate cells is limited to three⁻four, making a detailed timing analysis difficult. In this paper, we propose and validate a magn ...

2019

Exploring Lightweight Efficiency of Forkaes

Muhammed Fatih Balli, Subhadeep Banik

Recently the ForkAES construction was proposed by Andreeva et al. for efficiently performing authenticated encryption of very short messages on next generation IoT devices. The ForkAES tweakable block cipher uses around one and a half AES encryption calls ...

Springer2019

Leakage Flux Modeling of Multi-Winding Transformers for System-Level Simulations

Drazen Dujic, Min Luo, Jost Allmeling

In multiwinding transformers, different geometry of the individual windings leads to unbalanced leakage flux paths. The unbalance affects the behavior of the power electronic converters, where these transformers are used. This paper proposes an approach to ...

Ieee-Inst Electrical Electronics Engineers Inc2018

Dynamic Modeling of Magnetic Components for Circuit Simulation of Power Electronic Systems

Min Luo

Magnetic components play an important role in a power electronic converter system. They provide energy buffering, galvanic isolation and voltage ratio conversion and have significant impact on the overall performance of the system regarding power efficienc ...

EPFL2018

Electronics Emulation for Real-Time Fault Location in Power Systems

François Pierre Gaugaz

This research presents a high-speed hardware platform dedicated to emulate electrical power networks for the fault location. The solution implements an algorithm based on the Electromagnetic Time-Reversal (EMTR) principle, which allows locating faults in v ...

EPFL2017

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Andreas Peter Burg, Nicholas Alexander Preyss, Andrea Bonetti, Adam Shmuel Teman

Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...

Association for Computing Machinery2017

Computationally Efficient Multiple-Independent-Gate Device Model

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Gianluca Piccinini, Mariagrazia Graziano

Nanowire Field Effect Transistors (FETs) with multiple independent gates around a silicon channel feature ultimate gate control and are regarded as promising candidates for next generation transistors. Being inherently more complex than conventional gate-a ...

Institute of Electrical and Electronics Engineers2016

Idealized digital models for conical reed instruments, with focus on the internal pressure waveform

Two models for the generation of self-oscillations of reed conical woodwinds are presented. The models use the fewest parameters (of either the resonator or the exciter), whose influence can be quickly explored. The formulation extends iterated maps obtain ...

Acoustical Soc Amer Amer Inst Physics2016