Publication

Programmable Logic Circuits based on Ambipolar CNFET

Giovanni De Micheli, David Atienza Alonso, Yusuf Leblebici, Mohamed Haykel Ben Jamaa
2008
Conference Papers

Abstract

Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PLA) can be built out of these devices, and we illustrate how they outperform usual PLA by internal signal inversion. The simulations show an area saving up to approximately 21% and decrease of the delay in PLA-based FPGA by 50%. We also show that this architecture is suitable for high-performance design tools and defect-tolerance approaches.

Official source

https://infoscience.epfl.ch/entities/publication/6834d387-3a84-4747-9377-9a12e455ee09

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Giovanni De Micheli, David Atienza Alonso, Yusuf Leblebici, Mohamed Haykel Ben Jamaa
2008
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/6834d387-3a84-4747-9377-9a12e455ee09

About this result

Related concepts (18)

Programmable logic device

A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates with fixed functions, a PLD has an undefined function at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior performance.

Programmable Array Logic

Programmable Array Logic (PAL) is a family of programmable logic device semiconductors used to implement logic functions in digital circuits introduced by Monolithic Memories, Inc. (MMI) in March 1978. MMI obtained a registered trademark on the term PAL for use in "Programmable Semiconductor Logic Circuits". The trademark is currently held by Lattice Semiconductor. PAL devices consisted of a small PROM (programmable read-only memory) core and additional output logic used to implement particular desired logic functions with few components.

Complex programmable logic device

A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. Some of the CPLD features are in common with PALs: Non-volatile configuration memory. Unlike many FPGAs, an external configuration ROM isn't required, and the CPLD can function immediately on system start-up.

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