Publication

A High-performance, Low-cost PMU Prototype for Distribution Networks based on FPGA

Mario Paolone, Paolo Romano
2017
Conference Papers

Abstract

The application of Phasor Measurement Units (PMUs) to the real-time monitoring, protection and control of Distribution Networks, requires the availability of high accuracy devices that are characterized at the same time by a reasonable cost. This paper presents the design of a low-cost PMU prototype based on a Field Programmable Gate Array (FPGA) that integrates a recently published synchrophasor estimation technique, called iterative-Interpolated DFT (i-IpDFT). The adopted hardware platform is first introduced, then the major FPGA components are described and integrated in the overall board design. Finally, the performance of the developed prototype is evaluated in terms of the latency of the various PMU components and the scalability of the overall design.

Official source

https://infoscience.epfl.ch/entities/publication/df163043-d8d4-4f1e-a23c-c61598ed70a0

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Mario Paolone, Paolo Romano
2017
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/df163043-d8d4-4f1e-a23c-c61598ed70a0

About this result

Related concepts (20)

Phasor measurement unit

A phasor measurement unit (PMU) is a device used to estimate the magnitude and phase angle of an electrical phasor quantity (such as voltage or current) in the electricity grid using a common time source for synchronization. Time synchronization is usually provided by GPS or IEEE 1588 Precision Time Protocol, which allows synchronized real-time measurements of multiple remote points on the grid. PMUs are capable of capturing samples from a waveform in quick succession and reconstructing the phasor quantity, made up of an angle measurement and a magnitude measurement.

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

Programmable logic array

A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gates for N input variables, and for M outputs from PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms.

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