Publications associées à Processeur 64 bits

EdgeAI-Aware Design of In-Memory Computing Architectures

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

Alexandre Schmid, Keyvan Farhang Razi

A programmable patient-customized epileptic seizure detector is proposed in this paper to enable neurologists and patients to have constructive interactions with the implantable medical device. The programmability feature is enabled by designing a low-powe ...

IEEE2023

System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms

David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Rafael Medina Morillas, Joshua Alexander Harrison Klein

Multi-Chiplet architectures are being increasingly adopted to support the design of very large systems in a single package, facilitating the integration of heterogeneous components and improving manufacturing yield. However, chiplet-based solutions have to ...

2023

Hardware Implementation of Digital Signal Processing Algorithms for Programmable Epilepsy Control Systems

Keyvan Farhang Razi

Epilepsy is a common chronic neurological disorder that causes recurring seizures and affects more than 50 million people worldwide. Implantable medical devices (IMDs) are regarded as effective tools to cure patients who suffer from refractory epilepsy. Se ...

EPFL2023

Anonymous Tokens with Stronger Metadata Bit Hiding from Algebraic MACs

Serge Vaudenay, Fatma Betül Durak

On the one hand, the web needs to be secured from malicious activities such as bots or DoS attacks; on the other hand, such needs ideally should not justify services tracking people's activities on the web. Anonymous tokens provide a nice tradeoff between ...

2023

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workload ...

2022

List Ordered Statistics Decoders for Polar Codes

Andreas Peter Burg, Yifei Shen, Chuan Zhang

The de-facto standard decoding algorithm for polar codes, successive cancellation list (SCL) decoding, is a breadth-first search algorithm. By keeping a list of candidate codewords, SCL decoding improves the performance as the list size L increases. Howeve ...

IEEE2022

Lock-in amplified differential phase contrast

Christophe Moser, Timothé Laforest, Damien Claude-Marie Loterie, Chiara Bonati

We introduce a lock-in method to increase the phase contrast in incoherent Differential Phase Contrast (DPC) imaging. The use of a smart pixel detector with in-pixel signal demodulation, paired with synchronized illumination, provides the basis of a bit-ef ...

SPIE-INT SOC OPTICAL ENGINEERING2022

Bootstrapping for Approximate Homomorphic Encryption with Negligible Failure-Probability by Using Sparse-Secret Encapsulation

Jean-Pierre Hubaux, Juan Ramón Troncoso-Pastoriza, Jean-Philippe Léonard Bossuat

Bootstrapping parameters for the approximate homomorphic-encryption scheme of Cheon et al., CKKS (Asiacrypt 17), are usually instantiated using sparse secrets to be efficient. However, using sparse secrets constrains the range of practical parameters withi ...

SPRINGER INTERNATIONAL PUBLISHING AG2022

Lock-in incoherent differential phase contrast imaging

Christophe Moser, Timothé Laforest, Damien Claude-Marie Loterie, Chiara Bonati

We introduce a lock-in method to increase the phase contrast in incoherent differential phase contrast (DPC) imaging. This method improves the phase sensitivity by the analog removal of the background. The use of a smart pixel detector with in-pixel signal ...

CHINESE LASER PRESS2022

Full key recovery side-channel attack against ephemeral SIKE on the Cortex-M4

Aymeric Genet, Natacha Yolande Emmanuel Marie Linard de Guertechin, Novak Kaluderovic

This paper describes the first practical single-trace side-channel power analysis of SIKE. While SIKE is a post-quantum key exchange, the scheme still relies on a secret elliptic curve scalar multiplication which involves a loop of a double-and-add procedu ...

2021

Gem5-X : A Many-Core Heterogeneous Simulation Platform for Architectural Exploration and Optimization

David Atienza Alonso, Marina Zapater Sancho, William Andrew Simon, Yasir Mahmood Qureshi

The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this paper, ...

2021

The open EEGLAB portal Interface: High-Performance computing with EEGLAB

Fiorenzo Artoni

EEGLAB signal processing environment is currently the leading open-source software for processing electroencephalographic (EEG) data. The Neuroscience Gateway (NSG, nsgportal.org) is a web and API-based portal allowing users to easily run a variety of neur ...

2021

The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits

Subhadeep Banik, Muhammed Fatih Balli, Andrea Felice Caforio

The bit-sliding paper of Jean et al. (CHES 2017) showed that the smallest-size circuit for SPN based block ciphers such as AES, SKINNY and PRESENT can be achieved via bit-serial implementations. Their technique decreases the bit size of the datapath and na ...

2020

RetroWrite: Statically Instrumenting COTS Binaries for Fuzzing and Sanitization

Mathias Josef Payer, Duo Xu

Analyzing the security of closed source binaries is currently impractical for end-users, or even developers who rely on third-party libraries. Such analysis relies on automatic vulnerability discovery techniques, most notably fuzzing with sanitizers enable ...

IEEE COMPUTER SOC2020

A Fast, Reliable and Wide-voltage-range In-memory Computing Architecture

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, William Andrew Simon

In-Memory Computing (IMC) solutions, and particularly bitline computing in SRAM, appear promising as they mitigate one of the most energy consuming aspects in computation: data movement. In this work we propose a fast (2.4Ghz for bitwise operations and 2.4 ...

Association for Computing Machinery2019

Adaptive simulation-based framework for error characterization of inexact circuits

Vincent Frédéric Camus

To design faster and more energy-efficient systems, numerous inexact arithmetic operators have been proposed, generally obtained by modifying the logic structure of conventional circuits. However, as the quality of service of an application has to be ensur ...

PERGAMON-ELSEVIER SCIENCE LTD2019

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

IEEE2019

High Speed SAR ADC Architectures in 28nm FDSOI CMOS

Mustafa Kilic

The demand on high speed Analog to Digital Converters (ADCs) has increased considerably the last years. From communications circuit to high speed oscilloscopes, Giga Samples per second (GS/s) ADCs are requested. With the scaling of the CMOS technology, des ...

EPFL2019