Publications associées à Overclocking

33.3 MiBMI: A 192/512-Channel 2.46mm² Miniaturized Brain-Machine Interface Chipset Enabling 31-Class Brain-to-Text Conversion Through Distinctive Neural Codes

Mahsa Shoaran, Uisub Shin, Gregor Rainer, Mohammad Ali Shaeri, Amitabh Yadav

Recently, cutting-edge brain-machine interfaces (BMIs) have revealed the potential of decoders such as recurrent neural networks (RNNs) in predicting attempted handwriting [1] or speech [2], enabling rapid communication recovery after paralysis. However, c ...

IEEE2024

A Comprehensive Timing Model for Accurate Frequency Tuning in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Carmine Rizzi

The ability of dataflow circuits to implement dynamic scheduling promises to overcome the conservatism of static scheduling techniques that high-level synthesis tools typically rely on. Yet, the same distributed control mechanism that allows dataflow circu ...

IEEE COMPUTER SOC2022

Efficient Analytical Query Processing on CPU-GPU Hardware Platforms

Periklis Chrysogelos

Timely insights lead to business growth and scientific breakthroughs but require analytical engines that cope with the ever-increasing data processing needs. Analytical engines relied on rapid CPU improvements, yet the end of Dennard scaling stopped the fr ...

EPFL2022

Near-junction microfluidic cooling for high power-density GaN-on-Si electronics: A wafer, device, packaging, and system-level investigation

Remco Franciscus Peter van Erp

Electrification of the energy section, from generation to end-use, plays an essential role in reducing global CO2 emission. Innovations in power electronics are required to increase conversion efficiency and power density. Gallium nitride (GaN) transistors ...

EPFL2022

A Low Power Multi-Class Migraine Detection Processor Based on Somatosensory Evoked Potentials

Mahsa Shoaran, Bingzhao Zhu, Zain Taufique

Migraine is a disabling neurological disorder that can be recurrent and persist for long durations. The continuous monitoring of the brain activities can enable the patient to respond on time before the occurrence of the approaching migraine episode to min ...

2021

Low Noise Clock Generation: Modeling, Analysis and Implementation

Duygu Kostak

The aim of this thesis is to implement, analyze and improve the selected low noise clock generation and distribution techniques for ADC implementations. The thesis is divided into two parts. The first part focuses on the sampling phase generation and distr ...

EPFL2021

Experimental analysis of a thermoactive underground railway station

Lyesse Laloui, Alessio Ferrari, Azad Koliji, Jacopo Zannin, Tohid Kazerani

Little is known about the real energy potential of thermoactive underground infrastructures, such as railway stations, that can act as a heating/cooling provider for the built environment. This study presents the results of thermomechanical full-scale in s ...

2021

Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array Technology

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Mohamed Mostafa Sabry Aly, Halima Najibi

Deeply-scaled three-dimensional (3D) Multi-Processor Systems-on-Chip (MPSoCs) enable high performance and massive communication bandwidth for next-generation computing. However, as process nodes shrink, temperature-dependent leakage dramatically increases, ...

2020

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019

Fabrication and Characterisation of Epitaxial PMN-PT Nano-structures

Xiao Di

Downscaling of the minimal feature size, or the gate length has been the key for the exponential im-provement of the performance of the logic CMOS integrated circuits over the last six decades. How-ever, since about 2003, some fundamental limits in the dev ...

EPFL2019

Fast Energy Estimation Through Partial Execution of HPC Applications

Marina Zapater Sancho, José Luis Ayala Rodrigo

In order to optimize the energy use of servers in Data Centers, techniques such as power capping or power budgeting are usually deployed. These techniques rely on the prediction of the power and execution time of applications. These data are obtained via d ...

IEEE2018

Design Techniques for Ultra High Frequency Clock Generation in 28 nm FDSOI Technology

Hasene Gülperi Özsema

Twentieth century has been the golden age of semiconductor industry by achieving a high level of growth as a courtesy of developments in fabrication techniques and downscaling of the technology. Since the downscaling in current lithography technology is re ...

EPFL2017

DynOR: A 32-bit Microprocessor in 28 nm FD-SOI with Cycle-By-Cycle Dynamic Clock Adjustment

Andreas Peter Burg, Adam Shmuel Teman, Thomas Christoph Müller, Andrea Bonetti, Jeremy Hugues-Felix Constantin, Lorenz Flavio Schmid

This paper presents DynOR, a 32-bit 6-stage OpenRISC microprocessor with dynamic clock adjustment. To alleviate the issue of unused dynamic timing margins, the clock period of the processor is adjusted on a cycle-by-cycle level, based on the instruction ty ...

Ieee2016

The finite element square reduced (FE2R) method with GPU acceleration: towards three-dimensional two-scale simulations

Max Ludwig Hodapp

The FE2 method is a renown computational multiscale simulation technique for solid materials with fine-scale microstructure. It allows for the accurate prediction of the mechanical behavior of structures made of heterogeneous materials with nonlinear mater ...

Wiley-Blackwell2016

Key Energy and Technological Aspects of Three Innovative Concepts of District Energy Networks

François Maréchal, Daniel Favrat, Samuel Henchoz, Patrick Chatelan

Energy needs in urban areas are heterogeneous by their nature, spatial distribution and temperature level required. Three concepts of district energy networks that could provide the energy services efficiently to a city centre are compared. The focus is on ...

2016

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

Andreas Peter Burg, Georgios Karakonstantis, Jeremy Hugues-Felix Constantin, Anupam Chattopadhyay

Static timing analysis provides the basis for setting the clock period of a microprocessor core, based on its worst-case critical path. However, depending on the design, this critical path is not always excited and therefore dynamic timing margins exist th ...

2015

Key energy and technological aspects of three innovative concepts of District energy networks

François Maréchal, Daniel Favrat, Samuel Henchoz, Patrick Chatelan

In urban areas, the use of thermal energy services is intensive and relatively heterogeneous by their nature, spatial distribution and temperature level required. In this study three concepts of district energy networks that could provide these services ve ...

2015

QSpike tools: a generic framework for parallel batch preprocessing of extracellular neuronal signals recorded by substrate nnicroelectrode arrays

Michele Giugliano, Eleni Vasilaki

Micro-Electrode Arrays (MEAs) have emerged as a mature technique to investigate brain (dys)functions in vivo and in in vitro animal models. Often referred to as "smart" Petri dishes, MEAs have demonstrated a great potential particularly for medium-throughp ...

Frontiers Research Foundation2014

Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology

Georgios Karakonstantis

In this paper, a multi-level wordline driver scheme is presented to improve 6T-SRAM read and write stability. The proposed wordline driver generates a shaped pulse during the read mode and a boosted wordline during the write mode. During read, the shaped p ...

Elsevier2014

Dynamic Modeling and Experimental Evaluation of a Controlled Two-Phase On-Chip Cooling System Designed for High Efficiency Datacenters

Nicolas Lamaison

An important challenge for the next generation of high performance datacenters is to guarantee sufficient, reliable, green and cheap cooling of the server blades. Since this seems unrealistic with air cooling technologies due to the expected ever higher ch ...

EPFL2014