Concept

Logique floue

Publications associées (30)

Improving Standard-Cell Design Flow using Factored Form Optimization

Giovanni De Micheli, Alessandro Tempia Calvino

Factored form is a powerful multi-level representation of a Boolean function that readily translates into an implementation of the function in CMOS technology. In particular, the number of literals in a factored form correlates strongly with the number of ...

IEEE2023

Technology Mapping Using Multi-output Library Cells

Giovanni De Micheli, Alessandro Tempia Calvino

Technology mapping transforms a technology-independent representation into a technology-dependent one given a library of cells. Even if technology libraries contain multi-output cells, state-of-the-art techniques fully exploit single-output cells only. Mul ...

2023

Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition

Giovanni De Micheli, Andrea Costamagna

Approximate logic synthesis is an emerging field that tolerates errors in the synthesized logic circuits for better optimization quality. Indeed, in many computing problems, the requirement of preserving the exact functionality either results in unnecessar ...

IEEE2022

Dynamic Probabilistic Pruning: A General Framework for Hardware-Constrained Pruning at Different Granularities

Alexandre Schmid, Lizeth Gonzalez Carabarin

Unstructured neural network pruning algorithms have achieved impressive compression ratios. However, the resulting-typically irregular-sparse matrices hamper efficient hardware implementations, leading to additional memory usage and complex control logic t ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

Giovanni De Micheli, Heinz Riener, Shubham Rai, Akash Kumar

Emerging reconfigurable nanotechnologies allow the implementation of self-dual functions with a fewer number of transistors as compared to traditional CMOS technologies. To achieve better area results for Reconfigurable Field-Effect Transistors (RFET)-base ...

IEEE2021

A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa, Heinz Riener

Logic synthesis is a fundamental step in the realization of modern integrated circuits. It has traditionally been employed for the optimization of CMOS-based designs, as well as for emerging technologies and quantum computing. Recently, it found applicatio ...

IEEE2020

SAT-Sweeping Enhanced for Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

SAT-sweeping is a powerful method for simplifying logic networks. It consists of merging gates that are proven equivalent (up to complementation) by running simulation and SAT solving in synergy. SAT-sweeping is used in both verification and synthesis appl ...

IEEE2020

SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism

Giovanni De Micheli, Mathias Soeken, Winston Jason Haaswijk

Exact synthesis is a versatile logic synthesis technique with applications to logic optimization, technology mapping, synthesis for emerging technologies, and cryptography. In recent years, advances in SAT solving have lead to a heightened research effort ...

2020

Introducing reinforcement learning to the energy system design process

Jean-Louis Scartezzini, Amarasinghage Tharindu Dasun Perera, Pamuditha Udaranga Wickramasinghe, Vahid Moussavi Nik

Design optimization of distributed energy systems has become an interest of a wider group of researchers due the capability of these systems to integrate non-dispatchable renewable energy technologies such as solar PV and wind. White box models, using line ...

2020

Investigation of effective processes parameters on lead (II) adsorption from wastewater by biochar in mild air oxidation pyrolysis process

Farzaneh Talebkeikhah, Mohsen Talebkeikhah, Mohammad Torkashvand

This study evaluates and compares several machine learning methods on the effects of different parameters in lead adsorption capacity. pH, contact time, adsorbent dosage and initial lead concentration were considered as inputs and adsorption capacity was r ...

TAYLOR & FRANCIS LTD2022

Self-commissioning glare-based control system for integrated venetian blind and electric lighting

Jean-Louis Scartezzini, Laurent Deschamps, Ali Motamed

Rule-based control logics have proven to be efficient for automation of shading and lighting systems. However, successful commissioning of these systems for multiple stores non-residential buildings, regardless of the control logic, requires time-consuming ...

2020

Extending Boolean Methods for Scalable Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Eleonora Testa

In recent years, Boolean methods in logic synthesis have been drawing the attention of EDA researchers due to the continuous push to advance quality of results. Boolean methods require high computational cost, as they rely on complete functional properties ...

2020

Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

Reducing the number of AND gates plays a central role in many cryptography and security applications. We propose a logic synthesis algorithm and tool to minimize the number of AND gates in a logic network composed of AND, XOR, and inverter gates. Our appro ...

ASSOC COMPUTING MACHINERY2019

LUT-Based Hierarchical Reversible Logic Synthesis

Giovanni De Micheli, Mathias Soeken

We present a synthesis framework to map logic networks into quantum circuits for quantum computing. The synthesis framework is based on lookup-table (urn networks, which play a key role in conventional logic synthesis. Establishing a connection between LUT ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

SAT-Based Exact Synthesis for Multi-Level Logic Networks

Winston Jason Haaswijk

Today, the design of electronic systems is largely automated. The practice of using software automation technologies for the design of electronic hardware is commonly referred to as Electronic Design Automation (EDA). EDA comprises a large set of tools, fr ...

EPFL2019

Physico-chemical properties prediction of hydrochar in macroalgae Sargassum horneri hydrothermal carbonisation

Farzaneh Talebkeikhah, Mohsen Talebkeikhah

This study evaluates and compares several machine learning methods on the effects of different parameters in the hydrothermal carbonisation (HTC) process of macroalgae Sargassum horneri. Reaction temperature, residence time, biomass particle size, the amou ...

TAYLOR & FRANCIS LTD2021

Modeling and Assessment of Urban Energy Systems

Amarasinghage Tharindu Dasun Perera

Improving the energy sustainability of our cities involves the integration of multiple renewable energy technologies into existing energy infrastructure, stretching the capabilities of traditional energy systems to the limit. To consider the transition tak ...

EPFL2019

Logic Optimization of Majority-Inverter Graphs

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa, Heinz Riener, Winston Jason Haaswijk

Majority-inverter graphs (MIGs) are a multi-level logic representation of Boolean functions with remarkable algebraic and Boolean properties that enable efficient logic optimizations beyond the capabilities of conventional logic representations. In this pa ...

VDE Verlag2019

Real-Scenario Testing of an Active Phasor Data Concentrator

Mario Paolone, Asja Derviskadic, Guglielmo Frigo

The privileged position of the Phasor Data Concentrator (PDC) in a synchrophasor-based monitoring system can be exploited to make this device the core of a distributed measurement architecture suitable for control and protection applications in power syste ...

IEEE2019