Publications associées à Central processing unit

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

Imaging sensor device using an array of single-photon avalanche diode photodetectors

Edoardo Charbon, Andrei Ardelean

The invention relates to an Imaging sensor device in a stacked arrangement comprising: - a pixel array tier comprising a plurality of pixel segments each having a plurality of pixels for photon detection each providing a digital pixel output; - a processin ...

2024

General and Unified Model of the Power Flow Problem in Multiterminal AC/DC Networks

Mario Paolone, Willem Lambrichts

This paper proposes a generic and unified model of the power flow (PF) problem for multiterminal hybrid AC/DC networks. The proposed model is an extension of the standard AC-PF. The DC network is treated as an AC one and, in addition to the Slack, PV and P ...

IEEE Institute of Electrical and Electronics Engineers2024

Assessment framework for deepfake detection in real-world situations

Touradj Ebrahimi, Yuhang Lu

Detecting digital face manipulation in images and video has attracted extensive attention due to the potential risk to public trust. To counteract the malicious usage of such techniques, deep learning-based deepfake detection methods have been employed and ...

2024

EdgeAI-Aware Design of In-Memory Computing Architectures

Marco Antonio Rios

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Oligolithic Cross-task Optimizations across Isolated Workloads

Anastasia Ailamaki, Eleni Zapridou, Panagiotis Sioulas

Enterprises collect data in large volumes and leverage them to drive numerous concurrent decisions and business processes. Their teams deploy multiple applications that often operate concurrently on the same data and infrastructure but have widely differen ...

2024

33.3 MiBMI: A 192/512-Channel 2.46mm² Miniaturized Brain-Machine Interface Chipset Enabling 31-Class Brain-to-Text Conversion Through Distinctive Neural Codes

Mahsa Shoaran, Uisub Shin, Gregor Rainer, Mohammad Ali Shaeri, Amitabh Yadav

Recently, cutting-edge brain-machine interfaces (BMIs) have revealed the potential of decoders such as recurrent neural networks (RNNs) in predicting attempted handwriting [1] or speech [2], enabling rapid communication recovery after paralysis. However, c ...

IEEE2024

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

2024

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

David Atienza Alonso, Marina Zapater Sancho, Luis Maria Costero Valero, Darong Huang, Qunyou Liu

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

2024

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Aurélien François Gilbert Bloch

Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

EPFL2023

Impact of Video Processing Operations in Deepfake Detection

Touradj Ebrahimi, Yuhang Lu

The detection of digital face manipulation in video has attracted extensive attention due to the increased risk to public trust. To counteract the malicious usage of such techniques, deep learning-based deepfake detection methods have been developed and ha ...

2023

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Tomas Teijeiro Campo, Silvio Zanoli, Flavio Ponzina

Event-based sensors have the potential to optimize energy consumption at every stage in the signal processing pipeline, including data acquisition, transmission, processing, and storage. However, almost all state-of-the-art systems are still built upon th ...

2023

Dynamic control of high-voltage actuator arrays by light-pattern projection on photoconductive switches

Herbert Shea, Amir Firouzeh, Edouard Franck Vincent Gustave Leroy, Vesna Bacheva, Aiste Balciunaite

The ability to control high-voltage actuator arrays relies, to date, on expensive microelectronic processes or on individual wiring of each actuator to a single off-chip high-voltage switch. Here we present an alternative approach that uses on-chip photoco ...

SPRINGERNATURE2023

Automatic and high-precision microseismic monitoring of progressive failure prior, during, and after tunnel excavation

Brice Tanguy Alphonse Lecampion, Seyyedmaalek Momeni, Christophe Nussbaum

Acoustic emission (AE) monitoring is commonly used to inspect the health of a structure continuously. During fracture processes elastic waves of AE are created and emitted, and sensors can capture these waves. The acquired signals can be processed to track ...

2023

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Shashwat Shrivastava, Ognjen Glamocanin, Jinwei Yao, Nour Ardo

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

TiC-SAT: Tightly-coupled Systolic Accelerator for Transformers

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi, Joshua Alexander Harrison Klein

Transformer models have achieved impressive results in various AI scenarios, ranging from vision to natural language processing. However, their computational complexity and their vast number of parameters hinder their implementations on resource-constraine ...

2023

Automatic and high-precision acoustic emission-based structural health monitoring of concrete structures

Brice Tanguy Alphonse Lecampion, Seyyedmaalek Momeni

Acoustic emission (AE) monitoring is a useful technique to monitor the health of a structure continuously, helping to prevent potential failure. AE are elastic waves produced and emitted during fracture processes inside a material and are recorded by senso ...

DESTech publications inc.2023

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller

David Atienza Alonso, Miguel Peon Quiros, José Angel Miranda Calero, Simone Machetti, Pasquale Davide Schiavone, Thomas Christoph Müller, Rubén Rodríguez Álvarez, Benoît Walter Denkinger, Ruben Rodriguez, Saverio Nasturzio

In this work, we present eXtendible Heterogeneous Energy-Efficient Platform (X-HEEP), a configurable and extendible single-core RISC-V-based ultra-low-power microcontroller. X-HEEP can be used standalone as a low-cost microcontroller, or it can be integrat ...

New York2023

Scalable multi-chip quantum architectures enabled by cryogenic hybrid wireless/quantum-coherent network-in-package

Edoardo Charbon, Fabio Sebastiano

The grand challenge of scaling up quantum computers requires a full-stack architectural standpoint. In this position paper, we will present the vision of a new generation of scalable quantum computing architectures featuring distributed quantum cores (Qcor ...

IEEE2023