Logic level

Applied sciences
Électrotechnique
Ingénierie électronique
Électronique numérique

À propos
Confidentialité
Mentions légales

Graph Chatbot

Publications associées (28)

Kerr coefficients of plasma resonances in Josephson junction chains

We present an experimental and theoretical analysis of the self-and cross-Kerr effect of extended plasma resonances in Josephson junction chains. We calculate the Kerr coefficients by deriving and diagonalizing the Hamiltonian of a linear circuit model for ...

Amer Physical Soc2015

Majority Logic Synthesis for Spin Wave Technology

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Odysseas Zografos

Spin Wave Devices (SWDs) are promising beyond-CMOS candidates. Unlike traditional charge-based technologies, SWDs use spin as information carrier that propagates in waves. In this scenario, the logic primitive for computation is the majority gate. T ...

2014

Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we present Majority-Inverter Graph (MIG), a novel logic representation structure for efficient optimization of Boolean functions. An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented e ...

2014

Majority Logic Representation and Satisfiability

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Majority logic is a powerful generalization of common AND/OR logic. Original two-level and multi-level logic networks can use majority operators as primitive connective, in place of AND/ORs. In such a way, Boolean functions have novel means for compact rep ...

2014

A 5.43-μW 0.8-V Subthreshold Current-Sensing Σ∆ Modulator for Low-Noise Sensor Interfaces

Alexandre Schmid, Seyed Armin Tajalli, Yusuf Leblebici, Nikola Katic

A micro-watt power subthreshold current modulator suitable for low-power and low-noise sensor interfaces is presented. The prototype design is based on Subthreshold Source Coupled Logic (STSCL) cells and implemented in a 0.18 μm standard CMOS technology. T ...

2014

Gate-all-around buckled dual Si nanowire nMOSFETs on bulk Si for transport enhancement and digital logic

Mihai Adrian Ionescu, Didier Bouvet, Mohammad Najmzadeh

In this paper, we report formation of GAA buckled dual Si nanowire MOSFETs including two sub-80 nm Si cores on bulk Si using 0.8 mu m optical lithography and local oxidation for the first time. 0.833 GPa uniaxial tensile stress is measured in the buckled s ...

Elsevier Science Bv2013

An Efficient Gate Library for Ambipolar CNTFET Logic

Giovanni De Micheli, Mohamed Haykel Ben Jamaa

Recently, several emerging technologies have been reported as potential candidates for controllable ambipolar devices. Controllable ambipolarity is a desirable property that enables the on-line configurability of n-type and p-type device polarity. In this ...

2011

Morphological development of thick-tufted layer v pyramidal cells in the rat somatosensory cortex

Henry Markram, Yun Wang, Sandrine Romand

The thick-tufted layer V pyramidal (TTL5) neuron is a key neuron providing output from the neocortex. Although it has been extensively studied, principles governing its dendritic and axonal arborization during development are still not fully quantified. Us ...

2011

Page 2 sur 2