Publications associées à Unité de contrôle

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Shashwat Shrivastava, Ognjen Glamocanin, Jinwei Yao, Nour Ardo

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, high-level synthesis (HLS) tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed in conjunction with operation scheduling to ensure th ...

Assoc Computing Machinery2023

Training Efficient Controllers via Analytic Policy Gradient

Dario Floreano, Valentin Wüest, Davide Scaramuzza

Control design for robotic systems is complex and often requires solving an optimization to follow a trajectory accurately. Online optimization approaches like Model Predictive Control (MPC) have been shown to achieve great tracking performance, but requir ...

New York2023

Gate unit for a gate-commutated thyristor and integrated gate-commutated thyristor

Drazen Dujic, Jakub Kucka

The invention relates to a gate unit (22) for controlling a gate commutated thyristor (21), comprising: - a voltage selector (26) for selectively applying a high supply potential (Vpos), a middle supply potential (Vmid), and a low supply potential (Vneg); ...

2023

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, HLS tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed together with operation scheduling to ensure the best possible unit usage at ...

IEEE2022

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud, David Dervishi

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

2022

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Halima Najibi

Flow cell arrays (FCAs) concurrently provide efficient on-chip liquid cooling and electrochemical power generation. This technology is especially promising for three-dimensional multi-processor systems-on-chip (3D MPSoCs) realized in deeply scaled technolo ...

2022

Dynamic Probabilistic Pruning: A General Framework for Hardware-Constrained Pruning at Different Granularities

Alexandre Schmid, Lizeth Gonzalez Carabarin

Unstructured neural network pruning algorithms have achieved impressive compression ratios. However, the resulting-typically irregular-sparse matrices hamper efficient hardware implementations, leading to additional memory usage and complex control logic t ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A Noise-Resistant Mixed-Discrete Particle Swarm Optimization Algorithm for the Automatic Design of Robotic Controllers

Alcherio Martinoli, Cyrill Silvan Baumann

The automatic design of well-performing robotic controllers is still an unsolved problem due to the inherently large parameter space and noisy, often hard-to-define performance metrics, especially when sequential tasks need to be accomplished. Distal contr ...

2022

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Touradj Ebrahimi

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Multiple Line Outage Detection in Power Systems by Sparse Recovery Using Transient Data

Ping Hu, Feng Liu, Li Ding

Fast and accurate transmission line outage detection can help the central control unit to respond rapidly to better maintain the security and reliability of power systems. It is especially critical in the situation of multiple line outages which is more li ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Decoding of error-related potentials in continuous feedback protocols for personalized human computer interaction

Fumiaki Iwane

The ability to notice erroneous behavior is crucial for effective training. Within the framework of neuroprosthetics, numerous studies in electroencephalography (EEG) confirm the existence of neural correlates when humans perceive the erroneous actions of ...

EPFL2021

Operational Map And Thermal Performance Of A Thermosyphon Cooling System For Compact Servers

John Richard Thome, Jackson Braz Marcinichen, Filippo Cataldo, Raffaele Luca Amalfi

This paper advances the state-of-the-art in novel passive two-phase systems for more efficient cooling of datacenters and telecom central offices compared to the traditional air-based cooling solutions (e.g. aisle-based containment systems). The proposed p ...

AMER SOC MECHANICAL ENGINEERS2021

Biosensors for Bimolecular Computing: a Review and Future Perspectives

Sandro Carrara, Danilo Demarchi, Simone Aiassa

Biomolecular computing is the field of engineering where computation, storage, communication, and coding are obtained by exploiting interactions between biomolecules, especially DNA, RNA, and enzymes. They are a promising solution in a long-term vision, br ...

SPRINGER2020

Distributed modifier-adaptation schemes for the real-time optimisation of uncertain interconnected systems

Dominique Bonvin, René Uwe Schneider, Predrag Milosavljevic

This paper proposes a set of distributed real-time optimisation schemes for the steady-state optimisation of parametrically and structurally uncertain systems that are composed of multiple interconnected subsystems. These schemes are derived in the framewo ...

TAYLOR & FRANCIS LTD2019

A Data-Driven Method for Computing Fixed-Structure Low-Order Controllers With H∞ Performance

Alireza Karimi, Achille Nicoletti

Recently, a new data-driven method for robust control with H∞ performance has been proposed. This method is based on convex optimization and converges to the optimal performance when the controller order increases. However, for low-order controllers, the p ...

Elsevier2018

Ultra High-Speed Hardware Emulator for Real-Time Fault Location in Multi-Conductor Power Systems

Maher Kayal, François Krummenacher, François Pierre Gaugaz

This research presents a transmission line model aimed for the fault location in power systems using a method based on the Electromagnetic Time-Reversal (EMTR). The discrete-time model simulates the waves travelling in the line by means of many unit delays ...

IEEE2018

Automated Synthesis of Adversarial Workloads for Network Functions

Rishabh Ramesh Iyer, Aikaterini Argyraki, Arseniy Zaostrovnykh, Jonas Fietz, Luis David Figueiredo Mascarenhas Moreira Pedrosa

Software network functions promise to simplify the deployment of network services and reduce network operation cost. However, they face the challenge of unpredictable performance. Given this performance variability, it is imperative that during deployment, ...

ACM2018

Near-Memory Address Translation

Babak Falsafi, Javier Picorel Obando, Dorde Jevdic

Memory and logic integration on the same chip is becoming increasingly cost effective, creating the opportunity to offload data-intensive functionality to processing units placed inside memory chips. The introduction of memory-side processing units (MPUs) ...

Ieee2017

Experimental Implementation of Frequency Regulation Service Using Commercial Buildings

Colin Neil Jones, Ioannis Lymperopoulos, Tomasz Tadeusz Gorecki, Faran Ahmed Qureshi, Luca Fabietti, Altug Bitlislioglu

Frequency control reserves are a fundamental mechanism in the current electric power system to preserve the balance between demand and generation of active power at all times. The traditional approach is to exploit conventional power plants for frequency r ...

2018