Publications associées à Mémoire à tores magnétiques

Magnon-Assisted Magnetization Reversal of Ni81Fe19 Nanostripes on Y3Fe5O12 with Different Interfaces

Dirk Grundler, Andrea Mucchietto, Korbinian Baumgärtl

Magnetic bit writing by short-wave magnons without conversion to the electrical domain is expected to be a game-changer for in-memory computing architectures. Recently, the reversal of nanomagnets by propagating magnons was demonstrated. However, experimen ...

2024

A 128-kbit GC-eDRAM With Negative Boosted Bootstrap Driver for 11.3x Lower-Refresh Frequency at a 2.5% Area Overhead in 28-nm FD-SOI

Andreas Peter Burg, Robert Giterman, Halil Andac Yigit, Emmanuel Nieto Casarrubias

Gain-cell embedded DRAM (GC-eDRAM) is a high-density logic-compatible alternative to conventional static random-access memory (SRAM) and embedded DRAM (eDRAM). However, GC-eDRAM suffers from a reduced data retention time (DRT) at deeply-scaled process node ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

Chaosity: Understanding Contemporary NUMA-architectures

Anastasia Ailamaki, Viktor Sanca, Syed Mohammad Aunn Raza, Hamish Mcniece Hill Nicholson, Andreea Nica

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

2023

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

Anastasia Ailamaki, Syed Mohammad Aunn Raza, Hamish Mcniece Hill Nicholson, Periklis Chrysogelos

Accessing input data is a critical operation in data analytics: i) slow data access significantly degrades performance, and ii) storing everything in the fastest medium, i.e., memory, incurs high operational and hardware costs. Further, while GPUs offer in ...

2023

Towards Stable and Efficient Adversarial Training against $l_1$ Bounded Adversarial Attacks

Sabine Süsstrunk, Mathieu Salzmann, Yulun Jiang, Chen Liu, Zhuoyi Huang

We address the problem of stably and efficiently training a deep neural network robust to adversarial perturbations bounded by an

l_1

norm. We demonstrate that achieving robustness against

l_1

-bounded perturbations is more challenging than in the

l_2

...

2023

STEPS 4.0: Fast and memory-efficient molecular simulations of neurons at the nanoscale

Felix Schürmann, James Gonzalo King, Pramod Shivaji Kumbhar, Omar Awile, Christos Kotsalos, Tristan Mathieu Carel, Iain Hepburn, Samuel Marie A Melchior, Weiliang Chen, Baudouin Paul Michel Maria Joseph Del Marmol, Alessandro Cattabiani, Giacomo Castiglioni, Nicola Cantarutti

Recent advances in computational neuroscience have demonstrated the usefulness and importance of stochastic, spatial reaction-diffusion simulations. However, ever increasing model complexity renders traditional serial solvers, as well as naive parallel imp ...

FRONTIERS MEDIA SA2022

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

William Andrew Simon

Utilization of edge devices has exploded in the last decade, with such use cases as wearable devices, autonomous driving, and smart homes. As their ubiquity grows, so do expectations of their capabilities. Simultaneously, their formfactor and use cases lim ...

EPFL2022

AstriFlash: A Flash-Based System for Online Services

Babak Falsafi, Siddharth Gupta, Lei Yan, Mark Johnathon Sutherland, Yunho Oh

Modern datacenters host datasets in DRAM to offer large-scale online services with tight tail-latency requirements. Unfortunately, as DRAM is expensive and increasingly difficult to scale, datacenter operators are forced to consider denser storage technolo ...

2023

Design for Test With Unreliable Memories by Restoring the Beauty of Randomness

Andreas Peter Burg, Reza Ghanaatian Jahromi, Marco Widmer

This article presents a design-for-test methodology for embedded memories. The methodology relies on a fully random fault model of post-fabrication errors, which results in a low-overhead test strategy. The methodology's effectiveness is demonstrated on an ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

LENA: Communication-Efficient Distributed Learning with Self-Triggered Gradient Uploads

Martin Jaggi, Sebastian Urban Stich, Hossein Shokri Ghadikolaei

In distributed optimization, parameter updates from the gradient computing node devices have to be aggregated in every iteration on the orchestrating server. When these updates are sent over an arbitrary commodity network, bandwidth and latency can be limi ...

MICROTOME PUBLISHING2021

Synthesis, structural and magnetic characterization of thin films of the chiral magnets CoZnMn and FeGe

Anna Kúkol'ová

Skyrmions are topologically protected nanometer-sized magnetic vortices that have sparked interest for future spintronics applications aiming at high-density, high-speed and low-power consuming magnetic memory devices. One type of skyrmions appears in non- ...

EPFL2021

Path Replay Backpropagation: Differentiating Light Paths using Constant Memory and Linear Time

Wenzel Alban Jakob, Delio Aleardo Vicini, Sébastien Nicolas Speierer

Differentiable physically-based rendering has become an indispensable tool for solving inverse problems involving light. Most applications in this area jointly optimize a large set of scene parameters to minimize an objective function, in which case revers ...

ASSOC COMPUTING MACHINERY2021

Associativity-agnostic in-cache computing memory architecture optimized for multiplication

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

A random access memory array including a plurality of local memory group ways, each local memory group way including, a plurality of local memory groups, each local memory group including, a memory column including a plurality of memory cells, a pair of lo ...

2021

Engram cell connectivity: an evolving substrate for information storage

Maurizio Ferdinando Pezzoli, Siddhartha Sen

Understanding memory requires an explanation for how information can be stored in the brain in a stable state. The change in the brain that accounts for a given memory is referred to as an engram. In recent years, the term engram has been operationalized a ...

CURRENT BIOLOGY LTD2021

High-Level Synthesis of Dynamically Scheduled Circuits

Lana Josipovic

High-Level Synthesis (HLS) tools generate hardware designs from high-level programming languages. These tools almost universally build datapaths that are controlled using a centralized controller which relies on a static, compile-time schedule to determine ...

EPFL2021

Real-Time Personalized Atrial Fibrillation Prediction on Multi-Core Wearable Sensors

David Atienza Alonso, Amir Aminifar, Miguel Peon Quiros, Adriana Arza Valdes, Elisabetta De Giovanni

In the recent Internet-of-Things (IoT) era where biomedical applications require continuous monitoring of relevant data, edge computing keeps gaining more and more importance. These new architectures for edge computing include multi-core and parallel compu ...

2021

Accurate Emulation of Memristive Crossbar Arrays for In-Memory Computing

Irem Boybat Kara, Evangelos Eleftheriou

In-memory computing is an emerging non-von Neumann computing paradigm where certain computational tasks are performed in memory by exploiting the physical attributes of the memory devices. Memristive devices such as phase-change memory (PCM), where informa ...

IEEE2020

Accurate deep neural network inference using computational phase-change memory

Irem Boybat Kara, Evangelos Eleftheriou, Abu Sebastian

In-memory computing using resistive memory devices is a promising non-von Neumann approach for making energy-efficient deep learning inference hardware. However, due to device variability and noise, the network needs to be trained in a specific way so that ...

Nature Research2020