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Publications associées (32)

Giant switchable non thermally-activated conduction in 180 degrees domain walls in tetragonal Pb(Zr,Ti)O-3

Mihai Adrian Ionescu, Igor Stolichnov, Felix Risch

Conductive domain walls in ferroelectrics offer a promising concept of nanoelectronic circuits with 2D domain-wall channels playing roles of memristors or synoptic interconnections. However, domain wall conduction remains challenging to control and pA-rang ...

Nature Portfolio2022

VWR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

David Atienza Alonso, Miguel Peon Quiros, Benoît Walter Denkinger

Edge-computing requires high-performance energy-efficient embedded systems. Fixed-function or custom accelerators, such as FFT or FIR filter engines, are very efficient at implementing a particular functionality for a given set of constraints. However, the ...

ASSOC COMPUTING MACHINERY2022

Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers

David Atienza Alonso, Marina Zapater Sancho, Luis Maria Costero Valero, Darong Huang, Ali Pahlevan

Computing servers play a key role in the development and process of emerging compute-intensive applications in recent years. However, they need to operate efficiently from an energy perspective viewpoint, while maximizing the performance and lifetime of th ...

2022

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

Negative Capacitance in HfO2 Gate Stack Structures With and Without Metal Interlayer

Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Eamon Patrick O'Connor, Francesco Bellando, Matteo Cavalieri, Carlotta Gastaldi

In this work, we experimentally explore and compare FET gate stacks with and without an inner metal plane between a linear dielectric (SiO2) and a ferroelectric layer (Si-doped HfO2) operating in the negative capacitance (NC) regime. The use of nanosecond- ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Exploring ferroelectricity in HfO2-based thin films by tackling application-relevant challenges

Matteo Cavalieri

Ferroelectric materials offer a broad range of application-relevant properties, including spontaneous polarization switchable by electric field. Archetypical representatives of this class of materials are perovskites, currently used in applications ranging ...

EPFL2021

NVCache: A Plug-and-Play NVMM-based I/O Booster for Legacy Systems

Rafael Pereira Pires, Pascal Felber

This paper introduces NVCache, an approach that uses a non-volatile main memory (NVMM) as a write cache to improve the write performance of legacy applications. We compare NVCache against file systems tailored for NVMM (Ext4-DAX and NOVA) and with I/O-heav ...

IEEE2021

Software Support for Non-Volatile Memory (NVM) Programming

David Teksen Aksun

Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

EPFL2021

Path Replay Backpropagation: Differentiating Light Paths using Constant Memory and Linear Time

Wenzel Alban Jakob, Delio Aleardo Vicini, Sébastien Nicolas Speierer

Differentiable physically-based rendering has become an indispensable tool for solving inverse problems involving light. Most applications in this area jointly optimize a large set of scene parameters to minimize an objective function, in which case revers ...

ASSOC COMPUTING MACHINERY2021

Running Efficiently CNNs on the Edge Thanks to Hybrid SRAM-RRAM In-Memory Computing

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

The increasing size of Convolutional Neural Networks (CNNs) and the high computational workload required for inference pose major challenges for their deployment on resource-constrained edge devices. In this paper, we address them by proposing a novel In-M ...

IEEE2021

Memory chip or memory array for wide-voltage range in-memory computing using bitline technology

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, William Andrew Simon

A random access memory having a memory array having a plurality of local memory groups, each local memory group including a plurality of bitcells arranged in a bitcell column, a pair of local bitlines operatively connected to the plurality of bitcells, a p ...

2021

Crypt4GH: a file format standard enabling native access to encrypted data

Juan Ramón Troncoso-Pastoriza

Motivation: The majority of genome analysis tools and pipelines require data to be decrypted for access. This potentially leaves sensitive genetic data exposed, either because the unencrypted data is not removed after analysis, or because the data leaves t ...

OXFORD UNIV PRESS2021

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