Publications associées à Execution unit

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, high-level synthesis (HLS) tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed in conjunction with operation scheduling to ensure th ...

Assoc Computing Machinery2023

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, HLS tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed together with operation scheduling to ensure the best possible unit usage at ...

IEEE2022

Dalton: Learned Partitioning for Distributed Data Streams

Anastasia Ailamaki, Eleni Zapridou, Ioannis Mytilinis

To sustain the input rate of high-throughput streams, modern stream processing systems rely on parallel execution. However, skewed data yield imbalanced load assignments and create stragglers that hinder scalability. Deciding on a static partitioning for a ...

2022

The Mondrian Data Engine

Babak Falsafi, Boris Robert Grot, Alexandros Daglis, Javier Picorel Obando, Mario Paulo Drumond Lages De Oliveira, Dmitrii Ustiugov, Dionysios Pnevmatikatos, Nooshin Sadat Mirzadeh

The increasing demand for extracting value out of ever-growing data poses an ongoing challenge to system designers, a task only made trickier by the end of Dennard scaling. As the performance density of traditional CPU-centric architectures stagnates, adva ...

2017

Rigorous implementation of real-time systems – from theory to application

Joseph Sifakis

The correct and efficient implementation of general real-time applications remains very much an open problem. A key issue is meeting timing constraints whose satisfaction depends on features of the execution platform, in particular its speed. Existing rigo ...

2013

Fast and Scalable Temperature-driven Floorplan Design in 3D MPSoCs

David Atienza Alonso, Martino Ruggiero, Alessandro Vincenzi

Temperature-driven floorplaners have been recently proposed to alleviate the thermal problem in 3D multi-processor systems-on-chip (MPSoC). However, the proposed algorithms fail to provide fast placement of the modules when the complexity and the number of ...

IEEE Press2012

An ultra high-speed, mixed-signal emulator for solving power system dynamic equations

Maher Kayal, Sidi-Rachid Cherkaoui, Laurent Fabre, Ira Nagel, Fabrizio Lo Conte, Guillaume Olivier Lanz

This paper focuses on a new pipelined processing unit architecture dedicated to mixed-signal power system emulation. Prior research in this field has proven that analog emulation overcomes the speed limits of numerical simulators with reliable accuracy. Th ...

IEEE2011

MPSoC Design using Application-Specific Architecturally Visible Communication

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Philip Brisk

This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide high-throughput communication for streaming applications. Producer/consumer relationships map poorly onto cache-based MPSo ...

Springer-Verlag2009

Bipartite modular multiplication method

Marcelo Kaihara

This paper proposes a new modular multiplication method that uses Montgomery residues defined by a modulus M and a Montgomery radix R whose value is less than the modulus M. This condition enables the operand multiplier to be split into two parts that can ...

2008

Improvement of rehabilitation possibilities with the MotionMaker™

Reymond Clavel, Mohamed Bouri, Patrick Métrailler, Jacques Fournier, Carl Schmitt

"MotionMakertrade" is a stationary programmable test and training system for the lower limbs developed at the 'Ecole Polytechnique Federale de Lausanne' with the 'Fondation Suisse pour les Cybertheses'. The system is composed of two robotic orthoses compri ...

2006

A Dynamically Constrained Genetic Algorithm For Hardware-software Partitioning

Pierre-André Mudry, Guillaume Zufferey

In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level language our algorithm determines, using a dynamically-weighted fitness function ...

Association for Computing Machinery2006