Cette séance de cours couvre la mise en œuvre de la modulation de largeur d'impulsion (PWM) pour le contrôle LED à l'aide du codage VHDL. En commençant par le diagramme de blocs PWM, l'instructeur explique le processus de détection de bord, la génération de seuil et la fusion de plusieurs FF en un seul processus.
Andreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).Research interests and expertise
Circuits and systems for telecommunications (wireless and wired)
Prototyping and silicon implementation of new communication technologies
Development of communication algorithms and optimization for hardware implementation
Low-power VLSI signal processing for communications and other applications
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Students will acquire basic knowledge about methodologies and tools for the design, optimization, and verification of custom digital systems/hardware.
They learn how to design synchronous digital cir
Explore la transition des algorithmes aux architectures matérielles dans la conception de systèmes numériques, couvrant les architectures isomorphes, l'implémentation VHDL et les métriques d'efficacité matérielle.
Explore les machines d'état fini (FSM) dans la conception de systèmes numériques, couvrant les FSM Mealy et Moore, les diagrammes d'état, l'implémentation VHDL et l'encodage d'état.
Explore VHDL pour la simulation, le débogage, la modélisation temporelle, la simulation événementielle et la création de bancs d'essai dans la conception de systèmes numériques.
