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Simone Casale Brunet

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Publications associées (54)

Partitioning And Optimization Of High Level Stream Applications For Multi Clock Domain Architectures

Marco Mattavelli, Claudio Paolo Alberti, Endri Bezati, Simone Casale Brunet

In this paper we propose a design methodology to partition dataflow applications on a multi clock domain architecture. This work shows how starting from a high level dataflow representation of a dynamic program it is possible to reduce the overall power co ...

Ieee2013

Synthesis and optimization of high-level stream programs

Marco Mattavelli, Endri Bezati, Simone Casale Brunet

In this paper we address the problem of translating high-level stream programs, such as those written in MPEG's RVC-CAL dataflow language, into implementations in programmable hardware. Our focus is on two aspects: sufficient language coverage to make synt ...

2013

Methods to explore design space for MPEG RMC codec specifications

Marco Mattavelli, Richard Thavot, Ghislain Roquier, Endri Bezati, Abdallah Alaaeldin Abdelaziz Elguindy, Simone Casale Brunet

The recent MPEG Reconfigurable Media Coding (RMC) standard aims at defining media processing specifications (e.g. video codecs) in a form that abstracts from the implementation platform, but at the same time is an appropriate starting point for implementat ...

Elsevier Science Bv2013

Systems Design Space Exploration by Serial Dataflow Program Executions

Marco Mattavelli, Claudio Paolo Alberti, Simone Casale Brunet

2013

Design Space Exploration of High Level Stream Programs on Parallel Architectures: A focus on the Buffer Size Minimization and Optimization Problem

Marco Mattavelli, Claudio Paolo Alberti, Simone Casale Brunet

This paper presents a dataflow design methodology and an associated co-exploration environment, focusing on the optimization of buffer sizes. The approach is applicable to dynamic dataflow designs and its performance is presented and validated by experimen ...

2013

Dataflow Program Analysis and Refactoring Techniques for Design Space Exploration: MPEG-4 AVC/H.264 Decoder Implementation Case Study

Marco Mattavelli, Claudio Paolo Alberti, Ab Al Hadi Bin Ab Rahman, Simone Casale Brunet

This paper presents a methodology to perform design space exploration of complex signal processing systems implemented using the CAL dataflow language. In the course of space exploration, critical path in dataflow programs is first presented, and then anal ...

IEEE2013

TURNUS: A design exploration framework for dataflow system design

Marco Mattavelli, Simone Casale Brunet

While research on the design of heterogeneous concurrent systems has a long and rich history, a unified design methodology and tool support has not emerged so far, and thus the creation of such systems remains a difficult, time-consuming and error-prone pr ...

IEEE2013

Design Space Exploration and Implementation of RVC-CAL Applications using the TURNUS framework

Marco Mattavelli, Claudio Paolo Alberti, Ghislain Roquier, Endri Bezati, Simone Casale Brunet

2013

A Lego Mindstorms NXT Experiment for Model Predictive Control Education

Simone Casale Brunet

This paper presents an educational framework based on the Lego Mindstorms NXT robotic platform used to outline both the theoretical and practical aspects of the Model Predictive Control theory. The case of a two-wheeled inverted pendulum is considered as a ...

2013

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications

Marco Mattavelli, Claudio Paolo Alberti, Endri Bezati, Simone Casale Brunet

2013

Porting an MPEG-HEVC decoder to a low-power many-core platform

Marco Mattavelli, Claudio Paolo Alberti, Simone Casale Brunet, Damien Jack De Saint Jorre

After several generations of video coding standards, MPEG High Efficient Video Coding (HEVC) is likely to emerge as the video coding standards for HD and Ultra-HD TV. HEVC decoding is expected to be less computationally demanding and to provide a higher le ...

2013

Buffer optimization based on critical path analysis of a dataflow program design

Marco Mattavelli, Simone Casale Brunet

The trade-off between throughput and memory constraints is a common design problem in embedded systems, and especially for streaming applications, where the memory in question usually occurs in the form of buffers for streams of data. This paper presents a ...

IEEE2013

TURNUS: a unified dataflow design space exploration framework for heterogeneous parallel systems

Marco Mattavelli, Claudio Paolo Alberti, Simone Casale Brunet

This paper presents the main features of the TURNUS coexploration environment, an unified design space exploration framework suitable for heterogeneous parallel systems designed using an high level dataflow representation. The main functions of this tool a ...

IEEE2013

Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program

Marco Mattavelli, Richard Thavot, Ab Al Hadi Bin Ab Rahman, Endri Bezati, Simone Casale Brunet

This paper presents some strategies for design space exploration of FPGA-based signal processing systems that are specified using the CAL dataflow language. The actor- oriented, high-level of abstraction provided by CAL allows flexible exploration and cons ...

2012

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