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Luca Gaetano Amarù

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Publications associées (63)

Wave Pipelining for Majority-based Beyond-CMOS Technologies

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

The performance of some emerging nanotechnolo- gies benefits from wave pipelining. The design of such circuits re- quires new models and algorithms. Thus we show how Majority- Inverter Graphs (MIG) can be used for this purpose and we extend the related opt ...

2017

A Sound and Complete Axiomatization of Majority-n Logic

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay

Manipulating logic functions via majority operators recently drew the attention of researchers in computer science. For example, circuit optimization based on majority operators enables superior results as compared to traditional logic systems. Also, the B ...

Institute of Electrical and Electronics Engineers2016

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay

Realization of logic and storage operations in memristive circuits have opened up a promising research direction of in-memory computing. Elementary digital circuits, e.g., Boolean arithmetic circuits, can be economically realized within memristive circuits ...

Ieee2016

Boolean logic optimization in majority-inverter graphs

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

We present a Boolean logic optimization framework based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. Current MIG optimization is supported by a consistent alge ...

2016

Majority-Inverter Graph: A New Paradigm for Logic Optimization

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we propose a paradigm shift in representing and optimizing logic by using only majority (MAJ) and inversion (INV) functions as basic operations. We represent logic functions by Majority-Inverter Graph (MIG): a directed acyclic graph c ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Optimizing Majority-Inverter Graphs with Functional Hashing

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

A Majority-Inverter Graph (MIG) is a recently introduced logic representation form whose algebraic and Boolean properties allow for efficient logic optimization. In particular, when considering logic depth reduction, MIG algorithms obtained signific ...

IEEE2016

Exploiting Inherent Characteristic of Reversible Circuits for Faster Combinational Equivalence Checking

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

Reversible circuits implement invertible logic functions. They are of great interest to cryptography, coding theory, interconnect design, computer graphics, quantum computing, and many other fields. As for conventional circuits, checking the combinational ...

Ieee2016

Method for speeding up boolean satisfiability

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

A method for transforming a tautology check of an original logic circuit into a contradiction check of the original logic circuit and vice versa comprises interpreting the original logic circuit in terms of AND, OR, MAJ, MIN, XOR, XNOR, INV original logic ...

2016

Majority-based Synthesis for Nanotechnologies

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

We study the logic synthesis of emerging nanotechnologies whose elementary devices abstraction is a majority voter. We argue that synthesis tools, natively supporting the majority logic abstraction, are the technology enablers. This is because they allow d ...

Ieee2016

LUT Mapping and Optimization for Majority-Inverter Graphs

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Winston Jason Haaswijk, Mathias Soeken

A Majority-Inverter Graph (MIG) is a directed acyclic graph in which every vertex represents a three-input majority operation and edges may be complemented to indicate operand inversion. MIGs have algebraic and Boolean properties that enable efficie ...

2016

An MIG-based Compiler for Programmable Logic-in-Memory Architectures

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Resistive memories have gained high research attention for enabling design of in-memory computing circuits and systems. We propose for the first time an automatic compilation methodology suited to a recently proposed computer architecture solely based on r ...

Ieee2016

Inversion optimization in majority-inverter graphs

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

Many emerging nanotechnologies realize majority gates as primitive building blocks and they benefit from a majority-based synthesis. Recently, Majority-Inverter Graphs (MIGs) have been introduced to abstract these new technologies. We present optimi ...

Ieee2016

Notes on Majority Boolean Algebra

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay, Mathias Soeken

A Majority-Inverter Graph (MIG) is a homogeneous logic network, where each node represents the majority function. Recently, a logic optimization package based on the MIG data-structure, with 3-input majority node (M3) has been proposed [2], [30]. It is dem ...

IEEE2016

Towards More Efficient Logic Blocks by Exploiting Biconditional Expansion

Giovanni De Micheli, Gain Kim, Luca Gaetano Amarù, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon

Nowadays, Field Programmable Gate Arrays (FPGA) exploit Look-Up Tables (LUTs) to generate logic functions. A K-input LUT can implement any Boolean functions with K inputs. Thanks to this flexibility, LUTs remained concep ...

2015

A Fast Pruning Technique for Low-Power Inexact Circuit Design

Giovanni De Micheli, Jaime Joven Murillo, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Johan Broc

Inexact Circuits are circuits in which the accuracy of the output can be traded for cost savings (energy, area and/or delay). In the context of advanced technology scaling and power density increase, inexact circuits appear to be very promising as ...

IEEE2015

Exploiting Circuit Duality to Speed Up SAT

Giovanni De Micheli, Maciej Jerzy Ciesielski, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we establish a non-trivial duality between tautology and contradiction check to speed up circuit SAT. Tautology check determines if a logic circuit is true in every possible interpretation. Analogously, contradiction check dete ...

IEEE2015

New Logic Synthesis As Nanotechnology Enabler (invited paper)

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Subhasish Mitra

Nanoelectronics comprises a variety of devices whose electrical properties are more complex as compared to CMOS, thus enabling new computational paradigms. The potentially large space for innovation has to be explored in the search for technologies that ca ...

Ieee-Inst Electrical Electronics Engineers Inc2015

The EPFL Combinational Benchmark Suite

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we present the EPFL combinational benchmark suite. We aim at completing existing benchmark suites by focusing only on natively combinational benchmarks. The EPFL combinational benchmark suite consists of 23 combinational circuits desi ...

2015

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization

Giovanni De Micheli, Sandeep Miryala, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

As an answer to the new electronics market demands, semiconductor industry is looking for different materials, new process technologies and alternative design solutions that can support Silicon replacement in the VLSI domain. The recent introduction of gra ...

ACM2015

Majority logic synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

A method for optimizing an implementation of a logic circuit, comprising steps of providing an interpretation of the logic circuit in terms of 3 Boolean variable majority operators M, with each of the majority operators being a function of a plurality of v ...

2015

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