Publications de Pierre-Emmanuel Julien Marc Gaillardon

Extending Boolean Methods for Scalable Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

In recent years, Boolean methods in logic synthesis have been drawing the attention of EDA researchers due to the continuous push to advance quality of results. Boolean methods require high computational cost, as they rely on complete functional properties ...

2020

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

David Atienza Alonso, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin, Marina Zapater Sancho, Yasir Mahmood Qureshi, João Miguel Morgado Pereira Vieira

The need for running complex Machine Learning (ML) algorithms, such as Convolutional Neural Networks (CNNs), in edge devices, which are highly constrained in terms of computing power and energy, makes it important to execute such applications efficiently. ...

2019

Scalable Boolean Methods in a Modern Synthesis Flow

Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Jingshan Luo, Eleonora Testa, Mathias Soeken

With the continuous push to improve Quality of Results (QoR) in EDA, Boolean methods in logic synthesis have been recently drawing the attention of researchers. Boolean methods achieve better QoR than algebraic methods but require higher computational cost ...

2019

Functionality Enhanced Memories for Edge-AI Embedded Systems

David Atienza Alonso, Pierre-Emmanuel Julien Marc Gaillardon, William Andrew Simon, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

With the surge in complexity of edge workloads, it appeared in the scientific community that such workloads cannot be anymore overflown to the cloud due to the huge edge device to server communication energy cost and the high energy consumption induced in ...

IEEE2019

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giovanni Vincenzo Resta

Here, we review the most recent developments in the field of 2-D electronics. We focus first on the synthesis of 2-D materials, discussing the different growth techniques currently available and assessing their strengths and weaknesses. Moreover, we descri ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Post-P&R Performance and Power Analysis for RRAM-based FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Resistive Random Access Memory (RRAM)-based FPGAs are predicted to outperform conventional FPGAs architectures in area, delay and power over a wide range of voltage operations, allowing novel energy-quality trade-offs for reconfigurable computing. The oppo ...

2018

Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giovanni Vincenzo Resta

Atomically thin two-dimensional (2D) materials belonging to transition metal dichalcogenides, due to their physical and electrical properties, are an exceptional vector for the exploration of next-generation semiconductor devices. Among them, due to the po ...

2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giovanni Vincenzo Resta

Amongst 2-dimensional (2D) semiconductors of the transition-metal di-chalcogenide (TMDC) family [1], tungsten diselenide (WSe2) has shown ambipolar behavior [2], [3] coupled with high carrier mobility [4] and CMOS-like devices have been experimentally demo ...

IEEE2018

Conformal Deposition of Conductive Single-Crystalline Cobalt Silicide Layer on Si Wafer via a Molecular Approach

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Tsung-Han Lin, David Baudouin, Olha Sereda

The realization of metal-semiconductor contacts plays a significant role in ultrascaled integrated circuits. Here, we establish a low-temperature molecular approach for the conformal deposition of a 20-nm Co-rich layer on Si (100) wafers by reaction in sol ...

2018

Towards high-performance polarity-controllable FETs with 2D materials, 2018 Design

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giovanni Vincenzo Resta

As scaling of conventional silicon-based electronics is reaching its ultimate limit, two-dimensional semiconducting materials of the transition-metal-dichalcogenides family, such as MoS2 and WSe2, are considered as viable candidates for next-generation ele ...

IEEE2018

An FPGA-Based Test System for RRAM Technology Characterization

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Maxime Victor Thammasack, Armando Biscontini

Resistive random access memory (RRAM) technologies have recently gained large attention from the academic and industrial research communities. Significant efforts have been made to enhance the performance of the memory stacks from both communities through ...

2018

Logic Synthesis for RRAM-Based In-Memory Computing

Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

2018

Resistive random access memory based multiplexers and field programmable gate arrays

Giovanni De Micheli, Gain Kim, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

2018

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Pierre-Emmanuel Julien Marc Gaillardon, Alexandre Sébastien Julien Levisse

With the continuous scaling of CMOS technology, integrating an embedded high-density non-volatile memory appears to be more and more costly and technologically challenging. Beyond floating-gate memory technologies, bipolar resistive random access memories ...

2018

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Physical Design Considerations of One-level RRAM-based Routing Multiplexers

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Resistive Random Access Memory (RRAM) technology opens the opportunity for granting both high-performance and low- power features to routing multiplexers. In this paper, we study the physical design considerations related to RRAM- based routing mult ...

ACM2017

Low Temperature Wet Conformal Nickel Silicide Deposition for Transistor Technology through an Organometallic Approach

Giovanni De Micheli, Michele De Marchi, Pierre-Emmanuel Julien Marc Gaillardon, Tsung-Han Lin, Maxime Victor Thammasack, David Baudouin

The race for performance of integrated circuits is nowadays facing a downscale limitation. To overpass this nanoscale limit, modern transistors with complex geometries have flourished, allowing higher performance and energy efficiency. Accompanying this br ...

Amer Chemical Soc2017

Optimization Opportunities in RRAM-based FPGA Architectures

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon

Static Random Access Memory (SRAM)-based routing multiplexers, whatever structure is employed, share a common limitation: their area, delay and power increase linearly with the input size. This property results in most SRAM-based FPGA architectures ...

IEEE2017

A Compiler for Parallel and Resource-Constrained Programmable in-Memory Computing

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giulia Meuli, Mathias Soeken

Solid-state resistive switches have recently enabled low-power, scalable, non-volatile memories. Their proven intrinsic logic operation, allowing design of in-memory computing systems, attracted the attention of the research community. A Programmable Logic ...

2017