Publications de Eleonora Testa

Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits

Giovanni De Micheli, Eleonora Testa, Heinz Riener, Siang-Yun Lee

Adiabatic quantum-flux-parametron (AQFP) circuits are a family of superconducting electronic (SCE) circuits that have recently gained growing interest due to their low-energy consumption, and may serve as alternative technology to overcome the down-scaling ...

IEEE2021

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Eleonora Testa, Mathias Soeken, Dewmini Sudara Marakkalage, Heinz Riener

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

LUT-Based Optimization For ASIC Design Flow

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

In this paper, we develop a new LUT-based optimization flow tailored for the synthesis of ASICs rather than FPGAs. We enhance LUT-mapping to consider the literal/AIG cost of LUT-nodes. We extend traditional Boolean methods to simplify and re-shape LUT-netw ...

2021

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Eleonora Testa, Mathias Soeken, Dewmini Sudara Marakkalage, Heinz Riener

2020

A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa, Mathias Soeken, Heinz Riener

Logic synthesis is a fundamental step in the realization of modern integrated circuits. It has traditionally been employed for the optimization of CMOS-based designs, as well as for emerging technologies and quantum computing. Recently, it found applicatio ...

IEEE2020

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Giovanni De Micheli, Odysseas Zografos, Eleonora Testa, Mathias Soeken

Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...

2020

Extending Boolean Methods for Scalable Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

In recent years, Boolean methods in logic synthesis have been drawing the attention of EDA researchers due to the continuous push to advance quality of results. Boolean methods require high computational cost, as they rely on complete functional properties ...

2020

Data Structures and Algorithms for Logic Synthesis in Advanced Technologies

Eleonora Testa

Logic synthesis is a key component of digital design and modern EDA tools; it is thus an essential instrument for the design of leading-edge chips and to push the limits of their performance. In the last decades, the electronic circuits community has evolv ...

EPFL2020

SAT-Sweeping Enhanced for Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

SAT-sweeping is a powerful method for simplifying logic networks. It consists of merging gates that are proven equivalent (up to complementation) by running simulation and SAT solving in synergy. SAT-sweeping is used in both verification and synthesis appl ...

IEEE2020

A Hybrid Method for Spectral Translation Equivalent Boolean Functions

Giovanni De Micheli, Eleonora Testa, Mathias Soeken

The equivalence of Boolean functions with respect to five invariance (aka translation) operations has been well considered with respect to the Rademacher-Walsh spectral domain. In this paper, we introduce a hybrid approach that uses both the Reed-Muller an ...

IEEE2019

Logic Optimization of Majority-Inverter Graphs

Giovanni De Micheli, Luca Gaetano Amarù, Winston Jason Haaswijk, Eleonora Testa, Mathias Soeken, Heinz Riener

Majority-inverter graphs (MIGs) are a multi-level logic representation of Boolean functions with remarkable algebraic and Boolean properties that enable efficient logic optimizations beyond the capabilities of conventional logic representations. In this pa ...

VDE Verlag2019

Scalable Boolean Methods in a Modern Synthesis Flow

Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Jingshan Luo, Eleonora Testa, Mathias Soeken

With the continuous push to improve Quality of Results (QoR) in EDA, Boolean methods in logic synthesis have been recently drawing the attention of researchers. Boolean methods achieve better QoR than algebraic methods but require higher computational cost ...

2019

Scalable Generic Logic Synthesis: One Approach to Rule Them All

Giovanni De Michele, Luca Gaetano Amarù, Winston Jason Haaswijk, Eleonora Testa, Mathias Soeken, Heinz Riener

ACM2019

Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa, Mathias Soeken

Reducing the number of AND gates plays a central role in many cryptography and security applications. We propose a logic synthesis algorithm and tool to minimize the number of AND gates in a logic network composed of AND, XOR, and inverter gates. Our appro ...

ASSOC COMPUTING MACHINERY2019

The Complexity of Self-Dual Monotone 7-Input Functions

Giovanni De Micheli, Winston Jason Haaswijk, Eleonora Testa, Mathias Soeken

The study of the complexity of Boolean functions has recently found applications in logic synthesis and optimization algorithms, as for instance in logic rewriting. Previous works have focused on the minimum length of Boolean chains for functions up to 5 i ...

2019

Practical Exact Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Winston Jason Haaswijk, Eleonora Testa, Mathias Soeken

In this paper, we discuss recent advances in exact synthesis, considering both their efficient implementation and various applications in which they can he employed. We emphasize on solving exact synthesis through Boolean satisfiability (SAT) encodings. Di ...

IEEE2018

Pairs of majority-decomposing functions

Giovanni De Micheli, Eleonora Testa, Mathias Soeken

We are interested in decompositions xnf1f2 of the majority function over n odd arguments x1, ...,xnsuch that f1and f2do not depend on xn. In this paper, we derive the conditions for f1and f2that satisfy the decomposition. Such decompositions play a centr ...

2018

Size Optimization of MIGs with an Application to QCA and STMG Technologies

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa, Mathias Soeken, Heinz Riener

Majority-inverter graphs (MIGs) are a logic representation with remarkable algebraic and Boolean properties that enable efficient logic optimizations beyond the capabilities of traditional logic representations. Further, since many nano-emerging technologi ...

ASSOC COMPUTING MACHINERY2018

Logic Synthesis for Established and Emerging Computing

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa, Mathias Soeken

Logic synthesis is an enabling technology to realize integrated computing systems, and it entails solving computationally intractable problems through a plurality of heuristic techniques. A recent push toward further formalization of synthesis problems has ...

2018

Majority Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Eleonora Testa, Mathias Soeken

The majority function (xyz) evaluates to true, if at least two of its Boolean inputs evaluate to true. The majority function has frequently been studied as a central primitive in logic synthesis applications for many decades. Knuth refers to the majority f ...

ASSOC COMPUTING MACHINERY2018