Publication

Reconfigurable logic circuit

Edoardo Charbon, Francesco Regazzoni
2020
Patents

Résumé

The present invention relates to a reconfigurable logic circuit comprising - a first, second and third switching circuit arranged for receiving a first input bit, a second input bit and a third input bit, respectively, and each arranged for being configured in a mode wherein the corresponding input bit is passed on or in a mode wherein a fixed logical zero or one is passed on, - a first exclusive OR logic block operable on the outputs of said first, second and third switching circuit and arranged to output a sum bit, - a fourth, fifth and sixth switching circuit arranged for receiving a fourth input bit, a fifth input bit and a sixth input bit and arranged for being configured in a mode wherein the corresponding input bit is passed on or in a mode wherein a fixed logical zero or one is passed on, - a first, second and third AND logic block, each arranged for receiving a different pair of the outputs of said fourth, fifth and sixth switching circuit, - a second exclusive OR logic block operable on the outputs of said first, second and third AND logic block and arranged to produce a carry output bit.

Source officielle

https://infoscience.epfl.ch/entities/publication/082022a8-3267-44a1-880e-e6090d621fbd

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Edoardo Charbon, Francesco Regazzoni
2020
Patents

Résumé

Source officielle

https://infoscience.epfl.ch/entities/publication/082022a8-3267-44a1-880e-e6090d621fbd

À propos de ce résultat

Concepts associés (16)

Circuit logique programmable

Un circuit logique programmable ou PLD (Programmable Logical Device), est un circuit intégré logique qui peut être programmé après sa fabrication. Il se compose de nombreuses cellules logiques élémentaires contenant des bascules logiques librement connectables. L'utilisateur doit donc programmer le circuit avant de l'utiliser. Les différentes logiques de programmation (unique, reprogrammable) et d'architecture ont conduit à la création de sous-familles dont les plus connues sont les FPGA et les CPLD.

Reconfigurable computing

Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGAs). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the datapath itself in addition to the control flow. On the other hand, the main difference from custom hardware, i.e.

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

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