Publications associées à Detailed Placement for Dedicated LUT-Level FPGA Interconnect

Shear and steel-fibre reinforcement for the punching resistance of flat slabs at internal and edge columns

Reinforced concrete flat slabs consist of a continuous, thin concrete plate that rests on a grid of columns. The supporting surface of the columns is very small compared to the floor plan dimensions, leading to concentrations of shear forces near the colum ...

EPFL2024

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Siang-Yun Lee

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

How roughness emerges on natural and engineered surfaces

Jean-François Molinari, Ramin Aghababaei

Roughness, defined as unevenness of material surfaces, plays an important role in determining how engineering components or natural objects interact with other bodies and their environment. The emergence of fractal roughness on natural and engineered surfa ...

SPRINGER HEIDELBERG2023

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

Ognjen Glamocanin

The pervasive adoption of field-programmable gate arrays (FPGAs) in both cyber-physical systems and the cloud has raised many security issues. Being integrated circuits, FPGAs are susceptible to fault and power side-channel attacks, which require physical ...

EPFL2023

Caching and Neutrality

Aikaterini Argyraki, Pavlos Nikolopoulos, Muhammad Abdullah

We are used to defining network neutrality as absence of traffic differentiation, like policing or shaping. These mechanisms, however, are often not what determines end-users’ quality of experience (QoE). Most content today is accessed through edge caches, ...

ACM Association for Computing Machinery2023

A Visionary Look at the Security of Reconfigurable Cloud Computing

Francesco Regazzoni, Mirjana Stojilovic

Field-programmable gate arrays (FPGAs) have become critical components in many cloud computing platforms. These devices possess the fine-grained parallelism and specialization needed to accelerate applications ranging from machine learning to networking an ...

2023

Practical Implementations of Remote Power Side-Channel and Fault-Injection Attacks on Multitenant FPGAs

Francesco Regazzoni, Mirjana Stojilovic, Ognjen Glamocanin, Dina Gamaleldin Ahmed Shawky Mahmoud

Cloud computing environments increasingly provision FPGAs because of their fine-grained, highly parallel, and flexible hardware architecture. The availability of FPGAs in the cloud fueled research on the security risks associated with exposing FPGA fabric ...

Springer, Cham2023

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Stefan Nikolic

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023

Diffusion of energy technologies: the role and dynamics of supply-side information networks

Claudia Rebeca Binder Signer, Romano Tobias Wyss, Gloria Serra Coch, Maria Anna Hecher

The diffusion of energy technologies is key for supporting the energy transition. While social influence and peer effects have been extensively studied on the demand side and found to impact adoption, less focus has been given to the role of information ne ...

2023

Geometric tolerances of welded connections with inelastic panel zones

Dimitrios Lignos, Andronikos Skiadopoulos, Ce Wen

Prequalified beam-to-column connections in steel moment resisting frames usually concentrate inelastic deformations in the steel beam ends. As such, nonlinear geo-metric instabilities (i.e., local buckling) may occur in these regions at modest lateral drif ...

Ernst & Sohn2023

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Mirjana Stojilovic, David Dervishi, Dina Gamaleldin Ahmed Shawky Mahmoud

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

2022

Structured and tiled-based pruning of Deep Learning models targeting FPGA implementations

Alexandre Schmid, Lizeth Gonzalez Carabarin

Model compression techniques have lead to a reduction of size and number of computations of Deep Learning models. However, techniques such as pruning mostly lack of a real co-optimization with hardware platforms. For instance, implementing unstructured pru ...

IEEE2022

A Functional Perspective on Information Measures

Amedeo Roberto Esposito

Since the birth of Information Theory, researchers have defined and exploited various information measures, as well as endowed them with operational meanings. Some were born as a "solution to a problem", like Shannon's Entropy and Mutual Information. Other ...

EPFL2022

Design and management of three-dimensional multi-processor systems-on-chip with integrated flow cell arrays

Halima Najibi

Three-Dimensional Multi-Processor Systems-on-Chip (3D MPSoCs) are promising solutions for highly intensive Artificial Intelligence (AI) and Big Data applications. They combine remarkably dense computation capabilities and massive communication bandwidths. ...

EPFL2022

An insular cortex - lateral amygdala network in fear learning

Shriya Palchaudhuri

Animals are capable of evaluating sensory cues for possible threats and adapting their behaviours accordingly. Fear learning is an evolutionarily conserved behaviour crucial for animal survival, during which sensory percepts with a negative reinforcing qua ...

EPFL2022

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

Mirjana Stojilovic, Stefan Nikolic, Morten Borup Petersen

Novel applications have triggered significant changes at the system level of FPGA architecture design, such as the introduction of embedded VLIW processor arrays and hardened NoCs. However, the routing architecture of the soft logic fabric has largely rema ...

2021

Characterizing the Reserve Provision Capability Area of Active Distribution Networks: A Linear Robust Optimization Method

Sidi-Rachid Cherkaoui, Mokhtar Bozorg, Fabrizio Sossan, Mohsen Kalantar Neyestanaki

Distributed energy resources (DERs) installed in active distribution networks (ADNs) can be exploited to provide both active and reactive power reserves to the upper-layer grid (i.e., sub-transmission and transmission systems) at their connection point. Th ...

2021

Synthesizing General-Purpose Code Into Dynamically Scheduled Circuits

Paolo Ienne, Lana Josipovic, Andrea Guerrieri

Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs) have been widely used to implement a myriad of applications from different domains. As a result of their low-level hardware reconfigurability, FPGAs have much faster d ...

2021

LUT-Based Optimization For ASIC Design Flow

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

In this paper, we develop a new LUT-based optimization flow tailored for the synthesis of ASICs rather than FPGAs. We enhance LUT-mapping to consider the literal/AIG cost of LUT-nodes. We extend traditional Boolean methods to simplify and re-shape LUT-netw ...

2021

Improving First-Order Threshold Implementations of SKINNY

Andrea Felice Caforio, Ognjen Glamocanin, Subhadeep Banik, Daniel Patrick Collins

Threshold Implementations have become a popular generic technique to construct circuits resilient against power analysis attacks.In this paper, we look to devise efficient threshold circuits for the lightweight block cipher family SKINNY. The only threshol ...

Springer2021