Cryogenic single chip electron spin resonance detectors

Methods based on the electron spin resonance (ESR) phenomenon are used to study paramagnetic systems at temperatures that ranges from 1000 to below 1 K. Commercially available spectrometers achieve spin sensitivities in the order of 10^(10) spins/¿Hz at room temperature on sample with volumes in the order of few µl. This results can be improved by cooling the system at cryogenic temperatures, where the larger magnetization of paramagnetic samples cause the detected signal to increase. Furthermore operation at high field (frequency) turns as well in an improved spin sensitivity. For what it concern the spin sensitivity operation at cryogenic temperature and high frequency are thus beneficial. In 2008 the group of Dr. G. Boero proposed a novel detection method based on the integration of all the element responsible for the sensitivity on a single silicon chip. The methodology allowed to study sample with nanoliter scale volume with spin sensitivity that were at least 2 orders of magnitude better than the best commercial spectrometer. The proposed method has performance that are comparable with the one obtained on similar scales with micro-resonator based spectroscopy tool. During this thesis I have investigated the possibility of extending the use of the detection method from frequency that goes from 20 to 200 GHz and temperatures that range from 77 to 4 K. In this frame several domains were touched. First of all the design of CMOS silicon oscillators operating at frequency which are closed to the most modern technology frequency limit. The lack of model valid for the target frequencies and the needs of limiting the power consumption for matching the limited cooling power of cryogenic systems, made the subject a challenging and interesting research topic itself. The study produces a remarkable result of a system operating at about 170 GHz with a power consumption of about 3 mW at room temperature and about 1.5 mW at 4 K. With the realized devices the first measurements of integrated silicon CMOS LC oscillators at temperature below 77 K were performed. From this measurements we could confirm the presence of expected effect, such as minimum power consumption reduction and oscillator frequency increase. In addition to that, by measuring the frequency-bias characteristic, it's been noticed a succession of smooth region and sharp transitions. This jumps are tentatively attributed to the random telegraph signal (RTS) effect that is supposed to be the main responsible for the flicker noise in sub-micrometer MOS devices. Since the impact of RTS on the performance of highly scaled transistor performance is expected to grow with the technology scale down, measurement methods based on LC oscillator, that shows better sensitivity if compared with nowadays employed methods, might allow to better understand the mechanism governing the effect and to develop technological strategy for lowering the impact on the future CMOS technology node. The realized devices hav