Publications related to Data-rate units

Electrical Model of a Wireless mW-Power and Mbps-Data Transfer System Over a Single Pair of Coils

Alexandre Schmid, David Palomeque Mangut

This paper proposes a system to transfer both mW-power and Mbps-data over an inductive link using a single pair of coils. The system is able to handle a wide range of loads by implementing a load adapter block that divides the operation into two phases: a ...

IEEE2022

Energy-Efficient Design Techniques for High-Speed Wireline Serial Links

Firat Çelik

The exponential growth in computing power and multimedia services has caused a tremendous increase in data traffic in recent years. This increase in data traffic brings a strong demand for data bandwidth of electrical input/output (I/O) links and pushes th ...

EPFL2021

Resource Trade-Offs in Circuits and Systems: from Neurotechnology to Communications

Arda Uran

This thesis aims to explore and exploit trade-offs in integrated circuits and systems to overcome the fundamental bottlenecks faced by future data acquisition and communication systems. Specifically, we target the emerging implantable neurotechnology and t ...

EPFL2021

A 16-Channel Wireless Neural Recording System-on-Chip with CHT Feature Extraction Processor in 65nm CMOS

Volkan Cevher, Stéphanie Lacour, Catherine Dehollain, Cosimo Aprile, Alix Esther Anne Trouillet, Yusuf Leblebici, Kerim Türe, Florian Dylan Fallegger, Arda Uran

Wireless implantable neural recording chips enable multichannel data acquisition with high spatiotemporal resolution in situ. Recently, the use of machine learning approaches on neural data for diagnosis and prosthesis control have renewed the interest in ...

2021

A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET

Andreas Peter Burg, Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Gain Kim, Lukas Kull, Ilter Ozkaya, Thomas Toifl

This article introduces a wireline receiver (RX) data-path employing discrete multi-tone (DMT) modulation for communicating over electrical links. The DMT RX incorporates a fully digital equalization data-path, with a synthesized and automatically placed a ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

ISI Sensitivity of PAM Signaling for Very High-Speed Short-Reach Copper Links

Yusuf Leblebici, Seyed Armin Tajalli, Firat Çelik, Ayça Akkaya

This paper presents a comparative study, analyzing the potentials of pulse amplitude modulation (PAM) for implementing next generation high-speed copper wireline links. This comparative study analyzes the sensitivities of PAM2, PAM4 and PAM8 to inter-symbo ...

IEEE2019

JESD204B Compliant 12.5 Gb/s LVDS and SST Transmitters in 28 nm FD-SOI CMOS

Andreas Peter Burg, Seyed Armin Tajalli, Yusuf Leblebici, Firat Çelik, Ayça Akkaya

JESD204B compliant low-voltage differential signaling (LVDS), and source-series-terminated (SST) transmitters in 28 nm FD-SOI CMOS technology are presented with 1.1 pJ/bit and 1.7 pJ/bit at 12.5 Gb/s, respectively. An external 6.25 GHz single-ended clock, ...

IEEE2019

Design Considerations and Performance Trade-Offs for 56Gb/s Discrete Multi-Tone Electrical Link

Yusuf Leblebici, Gain Kim, Thomas Toifl

For communicating over mid-to-long-reach electrical links at a data-rate above 56Gb/s, ADC-based receiver (RX) has become a dominant architecture due to its strong equalization capability using complex digital signal processing algorithm benefiting from th ...

IEEE2019

Adaptive Receiver Design for High Speed Optical Communication

Ilter Ozkaya

Conventional input/output (IO) links consume power, independent of changes in the bandwidth demand by the system they are deployed in. As the system is designed to satisfy the peak bandwidth demand, most of the time the IO links are idle but still consumin ...

EPFL2018

Multi-Tone Signaling and ADC-Based Digital Receiver for High-Speed Wireline Serial Links

Gain Kim

The exponential growth of Internet traffic and related demands for higher communication speed pushes processor-to-processor and processor-to-memory interconnects to provide further higher data-rate. Often time, processor-to-memory interconnectsâ speed is ...

EPFL2018

A 60 Gb/s 1.9 pJ/bit NRZ Optical-Receiver with Low Latency Digital CDR in 14nm CMOS FinFET

Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Ilter Ozkaya, Thomas Toifl

This work reports a low power implementation of a 60Gb/s NRZ optical receiver (RX) in 14nm bulk CMOS finFET featuring a first-order digital CDR with high jitter tolerance (JTOL). The design includes a single phase-rotator (PR) with low complexity control l ...

2017

The Versatile Link Demo Board (VLDB)

The Versatile Link Demonstrator Board (VLDB) is the evaluation kit for the radiation-hard Optical Link ecosystem, which provides a 4.8 Gbps data transfer link for communication between front-end (FE) and back-end (BE) of the High Energy Physics experiments ...

2017

An Approximate Zero IF FM-UWB Receiver for High Density Wireless Sensor Networks

Christian Enz, Vladimir Kopta

A low-power frequency modulated-ultra-wideband (FM-UWB) receiver for short-range communications, capable of simultaneously demodulating multiple FM-UWB signals located at the same frequency, is presented in this paper. The proposed receiver utilizes an "ap ...

Institute of Electrical and Electronics Engineers2017

A Time-Division Multiplexing Signaling Scheme for Low-Power Multi-Drop Memory Links

Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao

A time-division multiplexing (TDM) digital channel coding scheme for wireline multi-drop interfaces has been proposed. Shaping the TX spectrum to avoid channel frequency notches, the proposed digital TDM signaling reduces inter-symbol interference (ISI) an ...

2017

A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links

Seyed Armin Tajalli, Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao

A time-division multiplexing (TDM) digital channel coding scheme with inter-symbol interference (ICI) reduction property for multi-drop memory interfaces has been proposed. Shaping the TX spectrum to avoid channel frequency notches, the proposed digital TD ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Optimization of the Data Rate of an OOK CMOS Medical Transmitter Based on LC Oscillators

Catherine Dehollain, Kerim Türe, Gürkan Yilmaz, Franco Maloberti

This paper presents techniques for increasing communication data rates for OOK modulated signals in the case the carrier frequency is generated by a cross-coupled pair LC oscillator. The proposed circuitry completely turns off the transmitter during the tr ...

Ieee2016

A compressed beamforming framework for ultrafast ultrasound imaging

Jean-Philippe Thiran, Yves Wiaux, Dimitris Perdios, Rafael Eduardo Carrillo Rangel, Marcel Arditi, Adrien Georges Jean Besson, Olivier Bernard

Classical beamforming methods, based on Delay- And-Sum (DAS) require an extensive number of samples and delay calculations to obtain high-quality images. Compressed Beamforming (CB) proposes an alternative to DAS, based on compressed sensing, which aims at ...

Ieee2016

Multi-Terabit/s Transmission Using Chip-Scale Frequency Comb Sources

Tobias Kippenberg, Victor Brasch, Tobias Herr

Chip-scale frequency comb sources are likely to become key elements of future terabit/s optical transceivers. We investigate and demonstrate the viability of different comb generation schemes for transmission at multiterabit/s data rates. ...

Ieee2016

A 420 mu W, 4 GHz Approximate Zero IF FM-UWB Receiver for Short-Range Communications

Christian Enz, Vladimir Kopta

A low-power FM-UWB receiver intended for short range communications in wireless sensor networks is presented in this paper. It utilizes an "approximate zero IF" architecture which combines a free-running ring oscillator as the RF LO with a modified delay-l ...

Ieee2016

Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology

Rafal Tomasz Dlugosz

This paper presents a programmable analog current-mode circuit used to calculate the distance between two vectors of currents, following two distance measures. The Euclidean (L2) distance is commonly used. However, in many situations, it can be replaced wi ...

Institute of Electrical and Electronics Engineers2016