Publications related to Delay-line memory

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

2024

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Guilherme Migliato Marega

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

EPFL2023

A 128-kbit GC-eDRAM With Negative Boosted Bootstrap Driver for 11.3x Lower-Refresh Frequency at a 2.5% Area Overhead in 28-nm FD-SOI

Andreas Peter Burg, Robert Giterman, Halil Andac Yigit, Emmanuel Nieto Casarrubias

Gain-cell embedded DRAM (GC-eDRAM) is a high-density logic-compatible alternative to conventional static random-access memory (SRAM) and embedded DRAM (eDRAM). However, GC-eDRAM suffers from a reduced data retention time (DRT) at deeply-scaled process node ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Chaosity: Understanding Contemporary NUMA-architectures

Anastasia Ailamaki, Viktor Sanca, Syed Mohammad Aunn Raza, Hamish Mcniece Hill Nicholson, Andreea Nica

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

2023

Flexure pivot based system

Simon Nessim Henein, Loïc Benoît Tissot-Daguette, Benoît Dagon, Michal Stanislaw Smreczak

Flexure pivot based system (1) being one of: a force sensor, a force limiting device arranged to exert a predetermined threshold force, a torque limiting device arranged to exert a predetermined threshold torque, a programmable mechanical memory, or an acc ...

2022

Low Noise Clock Generation: Modeling, Analysis and Implementation

Duygu Kostak

The aim of this thesis is to implement, analyze and improve the selected low noise clock generation and distribution techniques for ADC implementations. The thesis is divided into two parts. The first part focuses on the sampling phase generation and distr ...

EPFL2021

Associativity-agnostic in-cache computing memory architecture optimized for multiplication

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

A random access memory array including a plurality of local memory group ways, each local memory group way including, a plurality of local memory groups, each local memory group including, a memory column including a plurality of memory cells, a pair of lo ...

2021

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

Among the different types of dynamic random-access memories (DRAMs), gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power, and CMOS-compatible alternative to conventional static random-access memory (SRAM). GC-eDRAM achieves high memory density, as i ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

The rise of data-intensive applications has resulted in an increasing demand for high-density and low-power on-chip embedded memories. Gain-cell embedded DRAM (GC-eDRAM) is a logic-compatible alternative to conventional static random access memory (SRAM) w ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

Among the different types of DRAMs, gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power and CMOS-compatible alternative to conventional SRAM. GC-eDRAM achieves high memory density as it relies on a storage cell that can be implemented with as few as ...

IEEE2020

Improving Energy-Efficiency in Dynamic Memories Through Retention Failure Detection

Adam Shmuel Teman, Robert Giterman

A gain-cell embedded DRAM (GC-eDRAM) is an attractive logic-compatible alternative to the conventional static random access memory (SRAM) for the implementation of embedded memories, as it offers higher density, lower leakage, and two-ported operation. How ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

ReRAM From Material Study to CMOS Co-integration

Elmira Shahrabi

The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...

EPFL2019

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019

A New Engineering Model of Lightning M Component That Reproduces Its Electric Field Waveforms at Both Close and Far Distances

Farhad Rachidi-Haeri, Marcos Rubinstein, Mohammad Azadifar, Qi Li

We present a new engineering model for the M component mode of charge transfer to ground that can predict the observed electric field signatures associated with this process at various distances, including (a) the microsecond-scale pulse thought to be due ...

2019

Design Guidelines for High-Performance SCM Hierarchies

Babak Falsafi, Edouard Bugnion, Alexandros Daglis, Javier Picorel Obando, Mark Johnathon Sutherland, Dmitrii Ustiugov, Dionysios Pnevmatikatos

With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a fewfactors of DRAM. Nevertheless, the latency-sensitive nature of memory-residen ...

ACM2018

Ultra High-Speed Hardware Emulator for Real-Time Fault Location in Multi-Conductor Power Systems

Maher Kayal, François Krummenacher, François Pierre Gaugaz

This research presents a transmission line model aimed for the fault location in power systems using a method based on the Electromagnetic Time-Reversal (EMTR). The discrete-time model simulates the waves travelling in the line by means of many unit delays ...

IEEE2018

Nonsilicon, Non-von Neumann Computing—Part I

Giovanni De Micheli

Majority-inverter graphs (MIGs) are a logic representation with remarkable algebraic and Boolean properties that enable efficient logic optimizations beyond the capabilities of traditional logic representations. Further, since many nano-emerging technologi ...

IEE2018

Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging

Jean-Philippe Thiran, Giovanni De Micheli, Luca Benini, Federico Angiolini, Marcel Arditi, Aya Mohamed Naguib Ahmed Ibrahim

Ultrasound imaging is a reference medical diagnostic technique, thanks to its blend of versatility, effectiveness, and moderate cost. The core computation of all ultrasound imaging methods is based on simple formulae, except for those required to calculate ...

Ieee-Inst Electrical Electronics Engineers Inc2017

The Mondrian Data Engine

Babak Falsafi, Boris Robert Grot, Alexandros Daglis, Javier Picorel Obando, Mario Paulo Drumond Lages De Oliveira, Dmitrii Ustiugov, Dionysios Pnevmatikatos, Nooshin Sadat Mirzadeh

The increasing demand for extracting value out of ever-growing data poses an ongoing challenge to system designers, a task only made trickier by the end of Dennard scaling. As the performance density of traditional CPU-centric architectures stagnates, adva ...

2017

All-optical flip-flops based on dynamic Brillouin gratings in fibers

Luc Thévenaz, Marcelo Alfonso Soto Hernandez, Andrey Denisov

A method to generate an all-optical flip-flop is proposed and experimentally demonstrated based on dynamic Brillouin gratings (DBGs) in polarization maintaining fibers. In a fiber with sufficiently uniform birefringence, this flip-flop can provide extremel ...

Optical Society of America2017