Publications related to Serial Peripheral Interface

Design and in vitro Characterization of a Wearable Multisensing System for Hydration Monitoring

Sandro Carrara, Ata Jedari Golparvar, Ali Meimandi, Sarah Tonello

Dehydration is a frequent condition in the elderly and can lead to serious health complications if not compensated timely. Early diagnosis can be problematic, as medical examinations in the hospital would be needed. Fully wearable low-cost multisensing dev ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Latency Interfaces for Systems Code

Rishabh Ramesh Iyer

This thesis demonstrates that it is feasible for systems code to expose a latency interface that describes its latency and related side effects for all inputs, just like the code's semantic interface describes its functionality and related side effects. S ...

EPFL2023

Performance Interfaces for Network Functions

George Candea, Rishabh Ramesh Iyer, Aikaterini Argyraki

Modern programmers routinely use third-party code, and infrastructure operators deploy software they did not write. This would not be possible without semantic interfaces---documentation, header files, specifications---that succinctly describe what that th ...

USENIX Association2022

Six shades lighter: a bit-serial implementation of the AES family

Subhadeep Banik, Muhammed Fatih Balli, Sergio Roldán Lombardía

Recently, cryptographic literature has seen new block cipher designs such as PRESENT, GIFT or SKINNY that aim to be more lightweight than the current standard, i.e., AES. Even though AES family of block ciphers were designed two decades ago, they still rem ...

2021

ANTIGONE: A Programmable Energy-Efficient Current Digitizer for an ISFET Wearable Sweat Sensing System

Maher Kayal, Evgenia Voulgari, François Krummenacher

This article describes the design and the characterization of the ANTIGONE (ANalog To dIGital cONvErter) ASIC (Application Specific Integrated Circuit) built in AMS 0.35 m technology for low dc-current sensing. This energy-efficient ASIC was specifically d ...

2021

Serial Lightweight Implementation Techniques for Block Ciphers

Muhammed Fatih Balli

Most of the cryptographic protocols that we use frequently on the internet are designed in a fashion that they are not necessarily suitable to run in constrained environments. Applications that run on limited-battery, with low computational power, or area ...

EPFL2021

The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits

Subhadeep Banik, Muhammed Fatih Balli, Andrea Felice Caforio

The bit-sliding paper of Jean et al. (CHES 2017) showed that the smallest-size circuit for SPN based block ciphers such as AES, SKINNY and PRESENT can be achieved via bit-serial implementations. Their technique decreases the bit size of the datapath and na ...

2020

A programmable low-power ADC interface for an ISFET sweat sensor used in a wearable multi-sensing system

Maher Kayal, Evgenia Voulgari, François Krummenacher

An application specific integrated circuit (ASIC) named ANTIGONE (ANalog To dIGital cONvErter) was designed in AMS 0.35 mu m technology to interface with four Ion-sensitive field-effect transistor (ISFET) sensors and perform real-time monitoring of some bi ...

IEEE2019

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

IEEE2019

FPGA-Assisted Deterministic Routing for FPGAs

Mirjana Stojilovic, Dario Korolija

FPGA routing is one of the most time-consuming steps of FPGA compilation, often preventing fast edit-compile-test cycles in prototyping and development. There have been attempts to accelerate FPGA routing using algorithmic improvements, multi-core or multi ...

2019

Post-P&R Performance and Power Analysis for RRAM-based FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Resistive Random Access Memory (RRAM)-based FPGAs are predicted to outperform conventional FPGAs architectures in area, delay and power over a wide range of voltage operations, allowing novel energy-quality trade-offs for reconfigurable computing. The oppo ...

2018

Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme

Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao, Thierry Barailler

This paper presents the design and analysis of a serial link transceiver (TRX) architecture employing analog multi-tone (AMT) signaling for chip-to-chip communication. Multi-tone single-sideband (SSB) signaling scheme is proposed in TRX architecture in ord ...

Ieee-Inst Electrical Electronics Engineers Inc2017

An Out-of-Order Load-Store Queue for Spatial Computing

Paolo Ienne, Lana Josipovic, Philip Brisk

The efficiency of spatial computing depends on the ability to achieve maximal parallelism. This necessitates memory interfaces that can correctly handle memory accesses that arrive in arbitrary order while still respecting data dependencies and ensuring ap ...

Assoc Computing Machinery2017

Practical control methods for vacuum driven soft actuator modules

Jamie Paik, Matthew Aaron Robertson

Vacuum-powered Soft Pneumatic Actuator (VSPA) Modules have been described to afford advantages for rapid development of reconfigurable, multi-DoF soft pneumatic robots powered by vacuum by reducing their logistical complexity, however they also present new ...

2017

Analysis, Optimization, and Modeling of Analog Multi-Tone Serial Data Transceivers

Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust

This paper presents a versatile and fast time-domain architectural modeling framework for high-speed serial data transceivers (TRX) that can employ various analog modulation schemes. We highlight a modeling of TRXs employing an analog multi-tone signaling, ...

2017

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Seyed Armin Tajalli, Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust

An efficient signaling scheme for serial-data transceivers (TRXs) has been proposed, which can properly reduce inter-symbol interference (ISI) and crosstalk (Xtalk) in memory interfaces. The proposed architecture relies on fully-digital implementation rath ...

Ieee2016

Cyber-attack on Packet-Based Time Synchronization Protocols: the Undetectable Delay Box

Jean-Yves Le Boudec, Aswin Suresh, Sergio Barreto Andrade

We present a cyber-attack on packet-based time synchronization protocols (PBTSP) with high-accuracy requirements. The cyber-attack is undetectable from the PBTSP's perspective and exploits a vulnerability that is in the nature of all PBTSPs. It can be succ ...

Ieee2016

Architectural Modeling of a Multi-Tone/Single-Sideband Serial Link Transceiver for Lossy Wireline Data Links

Yusuf Leblebici, Gain Kim

This paper presents a serial link transceiver (TRX) architecture that enables high-speed data transmission over a lossy backplane channel without the presence of equalization circuits. The proposed architecture employs multi-tone signaling to reduce inter- ...

Ieee2016

Manycore Network Interfaces for In-Memory Rack-Scale Computing

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic

Datacenter operators rely on low-cost, high-density technologies to maximize throughput for data-intensive services with tight tail latencies. In-memory rack-scale computing is emerging as a promising paradigm in scale-out datacenters capitalizing on commo ...

2015

Proof of the Outage Probability Conjecture for MISO Channels

Emre Telatar, Emmanuel Abbé

It is conjectured that the covariance matrices minimizing the outage probability under a power constraint for multiple-input multiple-output channels with Gaussian fading are diagonal with either zeros or constant values on the diagonal. In the multiple-in ...

Institute of Electrical and Electronics Engineers2013