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Jyotshna Bhandari

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Related publications (3)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

Integration of Engineered Source and Drain Extensions in Double Gate Mosfet with Sub-32nm Channel Length

Jyotshna Bhandari

Since the advent of CMOS technology, the semiconductor industry has been successful in achieving continuously improved performance. The feature size of the most important electronic device, the Metal Oxide Semiconductor Field Effect Transistor (MOSFET), ha ...

EPFL2011

Double-Gate Pentacene TFTs with Improved Control in Subthreshold Region

Mihai Adrian Ionescu, Jürgen Brugger, Dimitrios Tsamados, Katrin Sidler Arnet, Jyotshna Bhandari, Andreea Veronica Savu, Nenad Cvetkovic

In this work a double-gate pentacene TFT architecture is presented. The devices are fabricated on a polyimide substrate using three aligned levels of stencil lithography along with standard photolithography, which enable a soft yet well controlled device p ...

IEEE2009

Study of n- and p-type dopants activation and dopants behavior with respect to annealing conditions in silicon germanium-on-insulator (SGOI)

Mihai Adrian Ionescu, Jyotshna Bhandari

We have investigated the p- and n-type dopants in thin SGOI (20 nm) material obtained by Ge enrichment. The samples are doped with either BF2 or arsenic or phosphorus and then annealed with either a spike or a 15 s rapid thermal annealing in a temperature ...

2008