Publications by Shashi Kanth Bobba

Resistive Switching Element and Use Thereof

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon, Tugba Demirci

A bipolar resistive switching device including an electrically conductive bottom electrode, a stack of transition metal oxides layers, a number of transition metal oxide layers being equal or greater than 2, the stack including: at least one MOx layer, at ...

2016

Layout Technique for Double-Gate Silicon Nanowire FETs With an Efficient Sea-of-Tiles Architecture

Giovanni De Micheli, Shashi Kanth Bobba

As we advance into the era of nanotechnology, semiconductor devices are scaled down to their physical limits, thereby opening up venues for new transistor channel materials based on nanowires and nanotubes. Transistors based on nanowires and nanotubes inhe ...

Ieee-Inst Electrical Electronics Engineers Inc2015

System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits

Giovanni De Micheli, Shashi Kanth Bobba, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon, Subhasish Mitra

The quest for technologies with superior device characteristics has showcased Carbon-Nanotube Field-Effect Transistors (CNFET) into limelight. In this work we present physical design techniques to improve the yield of CNFET circuits in the presence of Carb ...

Assoc Computing Machinery2014

Nanowire systems: technology and design (invited paper)

Giovanni De Micheli, Shashi Kanth Bobba, Michele De Marchi, Davide Sacchetto, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this work, we consider double independent gate, vertically-stacked nanowire FETs with gate-all-around structures and typical diameter of 20-nm. These devices, which we hav ...

Royal Soc2014

Cell Transformations and Physical Design Techniques for 3D Monolithic Integrated Circuits

Giovanni De Micheli, Shashi Kanth Bobba

3D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. In 3DMI technology the 3D contacts, connecting different active layers, are in the order of few 100 nm. Given the advantage of ...

2013

Vertically Stacked Double Gate Nanowires FETs with Controllable Polarity: From Devices to Regular ASICs

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Michele De Marchi, Davide Sacchetto, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

Vertically stacked nanowire FETs (NWFETs) with gate-all-around structure are the natural and most advanced extension of FinFETs. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., the device shows n- and p-type characteristics sim ...

2013

Towards Structured ASICs Using Polarity-Tunable SiNW Transistors, invited

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Michele De Marchi, Davide Sacchetto, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In addition to scaling semiconductor devices down to their physical limit, novel devices show enhanced functionality compared to conventional CMOS. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., they show n- and p-type charact ...

2013

Design Methodologies and CAD for Emerging Nanotechnologies

Shashi Kanth Bobba

With technology scaling reaching the fundamental limits of Si-CMOS in the near future, the semiconductor industry is in quest for innovation from various disciplines of integrated circuit (IC) design. At a fundamental level, technology forms the main drive ...

EPFL2013

3.5-D Integration: A Case Study

Giovanni De Micheli, Ciprian Seiculescu, Shashi Kanth Bobba, Vasileios Pavlidis, Pierre-Emmanuel Julien Marc Gaillardon

Two diverse manufacturing techniques for building 3-D integrated systems are vertical integration with Through-Silicon-Vias (TSVs), also referred to as 3-D TSV integration, and 3-D monolithic integration. In this paper, we present a hybrid integration sche ...

2013

Process/Design Co-optimization of Regular Logic Tiles for Double-Gate Silicon Nanowire Transistors

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Michele De Marchi, Davide Sacchetto, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

Ambipolar transistors with on-line configurability to n-type and p-type polarity are desirable for future integrated circuits. Regular logic tiles have been recognized as an efficient layout fabric for ambipolar devices. In this work, we present a process/ ...

2012

GMS: Generic Memristive Structure for Non-Volatile FPGAs

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon

The invention of the memristor enables new possibilities for computation and non-volatile memory storage. In this paper we propose a Generic Memristive Structure (GMS) for 3-D FPGA applications. The GMS cell is demonstrated to be utilized for steering logi ...

2012

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Yusuf Leblebici, Giovanni De Micheli, Shashi Kanth Bobba, Michele De Marchi

We have designed and fabricated double-gate ambipolar field-effect transistors, which exhibit p-type and n-type characteristics by controlling the polarity of the second gate. In this work, we present an approach for designing an efficient regular layout, ...

Ieee2012

CELONCEL: Effective Design Technique for 3-D Monolithic Integration targeting High Performance Integrated Circuits

Giovanni De Micheli, Shashi Kanth Bobba, Thomas Ernst

3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequential order, the size of the vertical contacts is similar to traditional contac ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2011

Carbon Nanotube Correlation: Promising Opportunity for CNFET Circuit Yield Enhancement

Giovanni De Micheli, Shashi Kanth Bobba, Subhasish Mitra, Jie Zhang

Carbon Nanotubes (CNTs) are grown using chemical synthesis, and the exact positioning and chirality of CNTs are very difficult to control. As a result, “small-width” Carbon Nanotube Field-Effect Transistors (CNFETs) can have a high probability of containin ...

2010

Design of a CNFET Array for Sensing and Control in P450 based Biochips for multiple drug detection

Giovanni De Micheli, Shashi Kanth Bobba, Sandro Carrara

Bio-detection specially dedicated to distributed diagnostics is emerging as a quite important application for Nanobioelectronics. Bio-detection is required to be highly sensitive in order to succeed in sensing small amount of bio-markers in patient’s blood ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

Design of Compact Imperfection-Immune CNFET Layouts for Standard-Cell-Based Logic Synthesis

Giovanni De Micheli, David Atienza Alonso, Shashi Kanth Bobba, Jie Zhang

The quest for technologies with superior device characteristics has showcased Carbon Nanotube Field Effect Transistors (CNFETs) into limelight. Among the several design aspects necessary for today’s grail in CNFET technology, achieving functional immunity ...

2009