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Publications associées (29)

Physical Model of Low-Temperature to Cryogenic Threshold Voltage in MOSFETs

Christian Enz, Farzan Jazaeri, Arnout Lodewijk M Beckers

This article presents a physical model of the threshold voltage in MOSFETs valid down to 4.2 K. Interface traps close to the band edge modify the saturating temperature behavior of the threshold voltage observed in cryogenic measurements. Dopant freezeout, ...

2020

Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

Reducing the number of AND gates plays a central role in many cryptography and security applications. We propose a logic synthesis algorithm and tool to minimize the number of AND gates in a logic network composed of AND, XOR, and inverter gates. Our appro ...

ASSOC COMPUTING MACHINERY2019

Triboelectric‐TFT Flip‐Flop for Bistable Latching of Dielectric Elastomer Actuators

Danick Briand, Herbert Shea, Rubaiyet Iftekharul Haque, Alexis Pierre Henri Marette, Xiaobin Ji, Ronan Julien Hinchet

A high‐voltage flip‐flop combining two self‐powered soft sensors with a flexible high‐voltage thin film transistor (HVTFT) is reported, and is used to electrically latch dielectric elastomer actuators (DEAs) in zero and high‐strain states. Two touch‐actuat ...

2019

Fluorescence lifetime imaging with a single-photon SPAD array using long overlapping gates: an experimental and theoretical study

Edoardo Charbon, Claudio Bruschini, Andrei Ardelean, Arin Can Ülkü

Developing large arrays of single-photon avalanche diodes (SPADs) with on-chip time-correlated single-photon counting (TCSPC) capabilities continues to be a difficult task due to stringent silicon real estate constraints, high data rates and system complex ...

2019

More Results on Shortest Linear Programs

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2019

Impact of Fin Width on Tri-Gate GaN MOSHEMTs

Elison de Nazareth Matioli, Jun Ma, Luca Nela, Giovanni Santoruvo, Taifang Wang

In this paper, we present a detailed investigation of the impact of fin width (w(fin)) on tri-gate AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs). As w(fin) is reduced, the threshold voltage (V-TH) increases, which is due ...

2019

Phasor-based widefield FLIM using a gated 512×512 single-photon SPAD imager

Claudio Bruschini, Edoardo Charbon, Ivan Michel Antolovic, Arin Can Ülkü

Single-photon avalanche diode (SPAD) imagers can perform fast time-resolved imaging in a compact form factor, by exploiting the processing capability and speed of integrated CMOS electronics. Developments in SPAD imagers have recently made them compatible ...

2019

Scaling-up ESOP Synthesis for Quantum Compilation

Giovanni De Micheli, Mathias Soeken, Bruno Schmitt Antunes

Today's rapid advances in quantum computing hardware call for scalable synthesis methods to map combinational logic represented as multi-level Boolean networks (e.g., an and inverter graph, AIG) to quantum circuits. Such synthesis process must yield revers ...

IEEE2019

H-terminated polycrystalline diamond p-channel transistors on GaN-on-Silicon

Elison de Nazareth Matioli, Remco Franciscus Peter van Erp, Riyaz Mohammed Abdul Khadar, Reza Soleiman Zadeh Ardebili, Mehdi Naamoun

In many semiconductor technologies, including GaN, the lack of p-channel devices is a major obstacle for complementary operations. Here, we demonstrate high-performance polycrystalline diamond p-channel transistors on GaN-on-Si. Following the optimization ...

Institute of Electrical and Electronics Engineers2019

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