Executing a dataflow program on a parallel platform requires assigning to each buffer a given size so that correct program executions take place without introducing any deadlock. Furthermore, in the case of dynamic dataflow programs, specific buffer size a ...
Field Programmable Gate Arrays (FPGAs) can benefit non-volatility and high-performance by exploiting Resistive Random Access Memories (RRAMs). In RRAM-based FPGAs, the memories do not only replace the SRAMs and store configurations, but they can also repla ...
In recent years, the use of 3D digital content becomes widespread in various industrial and scientific domains. However, content creation still remains a costly task as extensive manual work is often required. As such, one of the core research topics in co ...
In recent years the computing landscape has seen an increasing shift towards specialized accelerators. Field programmable gate arrays (FPGAs) are particularly promising for the implementation of these accelerators, as they offer significant performance and ...
With the rise of the “ludic city”, the work of Roger Caillois and Marc Breviglieri allows us to question the paradoxical character of planning and “programming” playfulness into public spaces, which should allow room for manoeuvre and encourage improvisati ...
We present an approach to program repair and its application to programs with recursive functions over unbounded data types. Our approach formulates program repair in the framework of deductive synthesis that uses existing program structure as a hint to gu ...
