Publications associées à Multiplieur-accumulateur

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Odysseas Zografos

Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...

2020

Blade: An in-Cache Computing Architecture for Edge Devices

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, William Andrew Simon, Yasir Mahmood Qureshi

Area and power constrained edge devices are increasingly utilized to perform compute intensive workloads, necessitating increasingly area and power efficient accelerators. In this context, in-SRAM computing performs hundreds of parallel operations on spati ...

2020

Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

2019

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

IEEE2019

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

Inner-Loop-Free ADMM for Cryo-EM

Michaël Unser, Laurène Donati, Emmanuel Emilien Louis Soubies

Thanks to recent advances in signal processing, the interest for fast ℓ1-regularized reconstruction algorithms in cryo-electron microscopy (cryo-EM) has intensified. The approaches based on the alternating-direction of multipliers method (ADMM) are particu ...

IEEE2019

Perspective on training fully connected networks with resistive memories: Device requirements for multiple conductances of varying significance

Giorgio Cristiano, Massimo Giordano

Novel Deep Neural Network (DNN) accelerators based on crossbar arrays of non-volatile memories (NVMs)-such as Phase-Change Memory or Resistive Memory-can implement multiply-accumulate operations in a highly parallelized fashion. In such systems, computatio ...

2018

Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter, Mattia Cacciotti

This paper introduces a novel method for designing approximate circuits by fabricating and exploiting false timing paths, i.e. critical paths that cannot be logically activated. This allows to strongly relax timing constraints while guaranteeing minimal an ...

2018

FIR filters for hardware-based real-time multi-band image blending

Yusuf Leblebici, Vladan Popovic

Creating panoramic images has become a popular feature in modern smart phones, tablets, and digital cameras. A user can create a 360 degree field-of-view photograph from only several images. Quality of the resulting image is related to the number of source ...

Spie-Int Soc Optical Engineering2015

A New Basic Logic Structure for Data-Path Computation

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Nowadays, Field Programmable Gate Arrays (FPGA) implement arithmetic functions using specific circuits at the logic block level, such as the carry paths, or at the structure level adopting Digital Signal Processing (DSP) blocks. Nevertheless, all these app ...

2014

Real-Time Hardware Implementation of Multi-Resolution Image Blending

Alexandre Schmid, Yusuf Leblebici, Vladan Popovic, Kerem Seyid

A novel real-time implementation of a multi-resolution image blending algorithm is presented in this paper. A multi-resolution decomposition of the input is used to blend multiple images at different scales. Processing time is shortened by designing a pipe ...

2013

Efficient SIMD arithmetic modulo a Mersenne number

Arjen Lenstra, Joppe Willem Bos, Thorsten Kleinjung

This paper describes carry-less arithmetic operations modulo an integer 2^M − 1 in the thousand-bit range, targeted at single instruction multiple data platforms and applications where overall throughput is the main performance criterion. Using an implemen ...

IEEE Computer Soc Press2011

An Efficient Gate Library for Ambipolar CNTFET Logic

Giovanni De Micheli, Mohamed Haykel Ben Jamaa

Recently, several emerging technologies have been reported as potential candidates for controllable ambipolar devices. Controllable ambipolarity is a desirable property that enables the on-line configurability of n-type and p-type device polarity. In this ...

2011

Improving FPGA Performance for Carry-Save Arithmetic

Paolo Ienne, Ajay Kumar Verma, Philip Brisk, Hadi Parandeh Afshar

The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP applications, and further opportunities to exploit it can be exposed throug ...

2010

Bipartite modular multiplication method

Marcelo Kaihara

This paper proposes a new modular multiplication method that uses Montgomery residues defined by a modulus M and a Montgomery radix R whose value is less than the modulus M. This condition enables the operand multiplier to be split into two parts that can ...

2008

STMBench7: A Benchmark for Software Transactional Memory

Rachid Guerraoui, Michal Kapalka

Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse-grained locking and easier to use than fine-grained locking. However, STM im ...

2007

A flexible framework for efficient design of advanced 3D audio systems in multimedia applications

Aleksandar Simeonov

The recent advance of computer technology pushed the computing power of the modern computer systems to unprecedented levels; modern processors moved from the conventional, scalar type of architecture to more sophisticated, parallel ones, combining fast pro ...

EPFL2004