Publications associées à Bfloat16 floating-point format

Towards General-Purpose Decentralized Computing with Permissionless Extensibility

Smart contracts have emerged as the most promising foundations for applications of the blockchain technology. Even though smart contracts are expected to serve as the backbone of the next-generation web, they have several limitations that hinder their wide ...

EPFL2024

TimeEvolver: A program for time evolution with improved error bound

Sebastian Zell

We present TimeEvolver, a program for computing time evolution in a generic quantum system. It relies on well-known Krylov subspace techniques to tackle the problem of multiplying the exponential of a large sparse matrix iH, where His the Hamiltonian, with ...

ELSEVIER2022

ColTraIn: Co-located DNN training and inference

Mario Paulo Drumond Lages De Oliveira

Deep neural network inference accelerators are deployed at scale to accommodate online services, but face low average load because of service demand variability, leading to poor resource utilization. Unfortunately, reclaiming inference idle cycles is diffi ...

EPFL2020

High Performance Computing for gravitational lens modeling: Single vs double precision on GPUs and CPUs

Jean-Paul Richard Kneib, Markus Rexroth, Christoph Ernst René Schäfer

Strong gravitational lensing is a powerful probe of cosmology and the dark matter distribution. Efficient lensing software is already a necessity to fully use its potential and the performance demands will only increase with the upcoming generation of tele ...

ELSEVIER2020

Multi-ReRAM synapses for artificial neural network training

Elmira Shahrabi, Igor Krawczuk, Yusuf Leblebici, Irem Boybat Kara, Carlo Ricciardi, Cecilia Giovinazzo, Evangelos Eleftheriou, Abu Sebastian

Metal-oxide-based resistive memory devices (ReRAM) are being actively researched as synaptic elements of neuromorphic co-processors for training deep neural networks (DNNs). However, device-level non-idealities are posing significant challenges. In this wo ...

IEEE2019

Optimized Quantization in Distributed Graph Signal Processing

Pascal Frossard, Isabela Cunha Maia Nobre

Distributed graph signal processing methods require that the graph nodes communicate by exchanging messages. These messages have a finite precision in a realistic network, which may necessitate to implement quantization. Quantization, in turn, generates er ...

IEEE2019

Non-perturbative probability distribution function for cosmological counts in cells

Sergey Sibiryakov, Mikhail Ivanov

We present a non-perturbative calculation of the 1-point probability distribution function (PDF) for the spherically-averaged matter density field. The PDF is represented as a path integral and is evaluated using the saddle-point method. It factorizes into ...

IOP PUBLISHING LTD2019

Optimized Quantization in Distributed Graph Signal Filtering

Pascal Frossard, Isabela Cunha Maia Nobre

Distributed graph signal processing algorithms require the network nodes to communicate by exchanging messages in order to achieve a common objective. These messages have a finite precision in realistic networks, which may necessitate to implement message ...

2019

Genius loci e memorie urbane. Il progetto di Ragnar Östberg per l’area di Eldkvarn

Chiara Monterumisi

The paper explores the city of Stockholm, apparently far from the main tracks of other significant European examples due to its peculiar morphological features. The study investigates the Stockholm Town Hall (Stadshuset) and the nearby never-to-be realized ...

2018

Trading off Energy versus Accuracy in Modern Computing Systems : From Digital Circuit Design to Programming Techniques

Jérémy Lucien Maurice Schlachter

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018

STEP-NC compliant process planning of additive manufacturing: remanufacturing

Ian Anthony Stroud, Jumyung Um

Additive manufacturing is becoming one of the key methods for reproducing repair sections in remanufacturing processes. The major advantage of using additive processes is to minimize production time and waste. However, the surface quality and shape accurac ...

Springer London Ltd2017

Approximate 32-Bit Floating-Point Unit Design with 53% Power-Area Product Reduction

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

The floating-point unit is one of the most common building block in any computing system and is used for a huge number of applications. By combining two state-of-the-art techniques of imprecise hardware, namely Gate-Level Pruning and Inexact Speculative Ad ...

Ieee2016

A Low-power Carry Cut-Back Approximate Adder with Fixed-point Implementation and Floating-point Precision

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

This paper introduces an approximate adder architecture based on a digital quasi-feedback technique called Carry Cut-Back in which high-significance stages can cut the carry propagation chain at lower-significance positions. This lightweight approach preve ...

Ieee2016

JPEG XT: A Compression Standard for HDR and WCG Images [Standards in a Nutshell]

Touradj Ebrahimi, Philippe Hanhart

High bit depth data acquisition and manipulation have been largely studied at the academic level over the last 15 years and are rapidly attracting interest at the industrial level. An example of the increasing interest for high-dynamic range (HDR) imaging ...

Institute of Electrical and Electronics Engineers2016

On the use of inexact, pruned hardware in atmospheric modelling

Giovanni De Micheli, Jaime Joven Murillo, Avinash Lingamneni

Inexact hardware design, which advocates trading the accuracy of computations in exchange for significant savings in area, power and/or performance of computing hardware, has received increasing prominence in several error-tolerant application domains, par ...

Royal Soc2014

Miniboxing: Improving the Speed to Code Size Tradeoff in Parametric Polymorphism Translations

Martin Odersky, Vlad Ureche, Cristian Talau

Parametric polymorphism enables code reuse and type safety. Underneath the uniform interface exposed to programmers, however, its low level implementation has to cope with inherently non-uniform data: value types of different sizes and semantics (bytes, in ...

2013

BRIEF: Computing a Local Binary Descriptor Very Fast

Pascal Fua, Vincent Lepetit, Christoph Strecha, Michael Calonder, Mustafa Özuysal, Tomasz Piotr Trzcinski

Binary descriptors are becoming increasingly popular as a means to compare feature points very fast and while requiring comparatively small amounts of memory. The typical approach to creating them is to first compute floating-point ones, using an algorithm ...

Institute of Electrical and Electronics Engineers2012

Thick Boundaries in Binary Space and Their Influence on Nearest-Neighbor Search

Pascal Fua, Vincent Lepetit, Tomasz Piotr Trzcinski

Binary descriptors allow faster similarity computation than real-valued ones while requiring much less storage. As a result, many algorithms have recently been proposed to binarize ﬂoating-point descriptors so that they can be searched for quickly. Unfortu ...

Elsevier2012

Trustworthy Numerical Computation in Scala

Viktor Kuncak, Eva Darulova

Modern computing has adopted the floating point type as a default way to describe computations with real numbers. Thanks to dedicated hardware support, such computations are efficient on modern architectures. However, rigorous reasoning about the resulting ...

2011

HW-SW Implementation of a Decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs

Giovanni De Micheli, Jaime Joven Murillo

Nowadays industrial monoprocessor and multipro- cessor systems make use of hardware floating-point units (FPUs) to provide software acceleration and better precision due to the necessity to compute complex software applications. This paper presents the des ...

2011